Connecting EPROM to FPGA

[djnik1362]

hi

I decide to connect an EPROM (M27C256B) to Xilinx Spartan II FPGA.
I want to know how EPROM work when a byte read from it.
As you know in most EPROMs we have CE and OE pins. (these pins are LOW enable)

What happens if i connect these two pins permanently to GND and change only
address inputs to read data from EPROM ?
The address inputs and data outputs of EPROM connect only to FPGA.

Can EPROM operate correctly if i use this configuration ?

Thanks for your support.

 

[Maxwell077]

If EPROM's CE and OE pins are edge-triggered, it's not possible to read data continuosly. If they are level triggered, it's possible to read data by changing address inputs.

 

[FvM]

If EPROM's CE and OE pins are edge-triggered.

They aren't. Consult a data sheet.

 

[djnik1362]

If EPROM's CE and OE pins are edge-triggered.

They aren't. Consult a data sheet.

You mean i can use this configuration ?

Is there any EPROM that edge trigger with CE ?

thanks.

 

[FvM]

Is there any EPROM that edge trigger with CE ?

Not for standard read operation, as far as I know. The read timing diagram in the datasheet is explicite in this regard.

 

[djnik1362]

Is there any EPROM that edge trigger with CE ?

Not for standard read operation, as far as I know. The read timing diagram in the datasheet is explicite in this regard.

So your idea is i can read EPROM with only changing it's address.
Is it true ?

Thanks.

 

[FvM]

If the EPROM is read permanently and not sharing the data bus, there's no benefit of using CE/OE.