I am trying to design a common emitter amplifier with a current mirror for active load for an AGC. The problem I am having is that the voltage at my base is 0.7V + Vin. This causes a voltage offset when using small gain and saturation when using large gain, which is specified by the feedback network. Any ideas on how to solve this?
The problem I am having is that the output of the amplifier is given by:
\[V_{out} = V_{be} - \frac{R_1}{R_2}(V_{in} - V_{be})\]
If I set the gain to -1, I have a sine wave centred at 1.4V. If I set the gain to -2, the sine wave is centred at 2.1V etc. Eventually, if the gain is large enough, the output reaches the positive power rail and my my output is just DC.