Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Comments on my PowerPCB design is welcome!!!

Status
Not open for further replies.

ChineseDragon

Junior Member level 3
Joined
May 31, 2002
Messages
26
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
110
My design contains a BGA package which has 836 pins(6 rounds),please give me some advice on:
1) minimum layers requied;
2) design rules;
Any commnets are very welcomed!!!
 

Hi CD!

Its hard to tell... very less information provided...

When i'm starting a projekt in the dimension that i think that you will do, i use 4 Layers: Signal/GND/VCC/Signal.
If it's more complex use more layers.

There are lots of posts in this forum on EMC and Board Layout you will find a bunch of information.

If you have more specific questions i can give you better answers...

regards
Elvis
 

Generally speaking, with a large BGA you very often need more than 4 layers, and it depends....
Some factors having major impact in my experience:
*How many voltages you have to feed to the BGA? (maybe more than one voltage plane is needed....)
*How much space you have in between the "bumps"/pads?
*Minimum via size--you have a real pain if your rules do not allow combination of 4 BGA pads and a via in middle.....
*Design rules in general you plan/have to use? See the above two examples of practical issues, and figure out if you at all can get some wires and vias where you need them!
*how any wires you have to actually connect, usually there are many "n/c" pins in any given design.

A good practice might be to first check your rule set for the basic requirements and then try the layout.

Good luck,
Ted
 

what's gap between pads? If this gap is small,I think 6 signal layer is a choice. you can fan out all pins .
 

U can go for minimum 6 sig layers.Set minimum 1 * track width spacing for track to pad, via,copper etc.,,,.Track to track spacing,,in BGA area go for 1 * track width spacing & go for 3 * track width spacing other than bga area.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top