barbs2021
Newbie level 5
Hello, I am trying to simulate clocked comparators. What does it mean when you say, this comparator can work or operate at say 6 GHz? Does it pertain to sampling frequency?
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Oh, I see. Is there any relationship between the frequency of the clock on how the frequency of the analog input signal should be set?Yes. The 6 GHz refers to the sampling clock frequency in clocked comparators.
Oh, I see. Is there any relationship between the frequency of the clock on how the frequency of the analog input signal should be set?
What if I'm going to design a clocked comparator to be integrated into flash ADC?Hi,
I can't agree.
There are ADCs where the analog frequency is below sampling frequency.
But there are also dedicated undersampling ADCs where the analog input frequency is above the sampling frequency.
Klaus
It would be better if you could support your arguement with examples, which of course is true.Hi,
I can't agree.
There are ADCs where the analog frequency is below sampling frequency.
But there are also dedicated undersampling ADCs where the analog input frequency is above the sampling frequency.
Klaus
Do you the target design specifications? It should be 3GHz input signal bandwidth for your case, with the Nyquist sampling theorem followed.What if I'm going to design a clocked comparator to be integrated into flash ADC?
I have not set full design specifications yet but I want to design the comparator such that it can operate from 1 GHz-5 GHz or more. Any suggestions would be very well appreciated.It would be better if you could support your arguement with examples, which of course is true.
What I meant is "generally", in majority of the applications Nyquist Sampling theorem is followed. Undersampling in data converters is not covered in the majority of universities at the fundamental level. Read any book or attend any course.
So for starters, Fin < Fs/2 is a good choice, to begin with for understanding and working on the design of data converters. If interested, one can explore undersampling, also based on the application one is targeting.
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Do you the target design specifications? It should be 3GHz input signal bandwidth for your case, with the Nyquist sampling theorem followed.
Well. That is a very vague answer even to seek help. You should spend some time reading the fundamentals of Flash ADC design and set the target design specifications based on the application you want to target.I have not set full design specifications yet but I want to design the comparator such that it can operate from 1 GHz-5 GHz or more. Any suggestions would be very well appreciated.
Yes, of course I have been reading resources. What I meant was some tips based on experience in working with Flash ADC. Anyways, thank you very much.Well. That is a very vague answer even to seek help. You should spend some time reading the fundamentals of Flash ADC design and set the target design specifications based on the application you want to target.