Hi everyone,
suppose i have finish place, clock tree and route stages.
but now i want to make a change in my design (for example - floorplan size),
should i run the whole flow all over again, or there are commands that update the changes.
thanks.
If you want to make a logical design changes as you go ahead but keep some portions of the IC the same. Your can try incremental design. I presume your using synopsys.
my question was about changing the floorplan..size for example, not logical changes..
and what do you mean " Your can try incremental design"?
and yes, i use Synopsys.
thanks.
If your floorplan change is only in one dimension, look at the modules which are to be modified and alter those alone for the new floorplan. You can fix the module floor plan and then add to it (incremental flow).
In the case you want to change both dimensions then you might as well redo everything.
I think you should redo every step no doubt.
because your design floorplan changed, so the pin locations and chip size changed, and the clock and timing changed, so you need redesign.