Capacitor layouts in advanced VLSI chips

[Zarrin]

Hello everyone,

I want to know some materials about implementing capacitors in advanced VLSI circuits (below 100nm). First of all, which methods are used to implement capacitors? Based on what i found, currently, MOS capacitors, MIM (Metal-Insulator-Metal) and MOM (Metal-Oxide-Metal) are conventional methods for laying out capacitors. Which method is more prevalent than others? What is the range of variation?

Thanks

 

[dick_freebird]

MOS for density, MIM/MOM for linearity and ESR. Figure 5-10%
Tox control, similar for the valued capacitor dielectric, but
ask your foundry for the control / acceptance limits.