CANbus Message detect fpga

[johnnyz86]

vhdl canbus

Hello,

I am interested in using a fpga to detect various kinds of CANbus messages. Right now I am starting with just detecting the message with all the signals decoded into 0's and 1's. Should I write it in VHDL? I have access to Synplicity DSP, which can use SIMULINK in matlab.

I am not all that experienced with this stuff, but my first instinct was a state machine. Then I've thought about just a large register to compare with the incoming data.

Any help is greatly appreciated!

 

[svhb]

canbus verilog

You can include a CAN-controller in the fpga. www.opencores.com.
It uses a processor bus for interfacing, but it is possible to change it to your own needs.

Remeber using CAN-bus, you need to contact BOSH for license issues.

 

[johnnyz86]

thank you for the link, seems like an awesome site.

I am hoping for compatability with J1939, but the frame formats i've seen often don't include the SRR and IDE in the CAN2.0b extended frame. Which is it?

 

[svhb]

Sorry for my late reply.

The core on the opencore site is compatible with the SJA1000 controller.

But like I said, you can change the bus interface, and the register assignment if you you have some Verilog experience.

Stefaan