lupineye
Junior Member level 3
I simulated a dural port memory with my top model.
then modelsim produced this error message!
I don't exactly understand what it means!
please make this message clear to me!
Thank you! so much!
Top level modules:
# glbl
# vsim -L xilinxcorelib_ver -L unisims_ver -lib work -t 1ps testbench1_vhd glbl
# ** Error: License checkout has been disallowed because
# only one session is allowed to run on an uncounted nodelock
# license and an instance of ModelSim is already running with a
# nodelocked license on this machine
# Error loading design
# Error: Error loading design
# Pausing macro execution
# MACRO ./testbench1_vhd.fdo PAUSED at line 9
then modelsim produced this error message!
I don't exactly understand what it means!
please make this message clear to me!
Thank you! so much!
Top level modules:
# glbl
# vsim -L xilinxcorelib_ver -L unisims_ver -lib work -t 1ps testbench1_vhd glbl
# ** Error: License checkout has been disallowed because
# only one session is allowed to run on an uncounted nodelock
# license and an instance of ModelSim is already running with a
# nodelocked license on this machine
# Error loading design
# Error: Error loading design
# Pausing macro execution
# MACRO ./testbench1_vhd.fdo PAUSED at line 9