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Behavariol Data Modelling

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bitprolix

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Hi All,

I'm a newbie in the digital modelling world and I'm really keen on learning it. As part of the college curriculum, i've been given a task to model an elevator whose functioning is mentioned **broken link removed**, I've been working on it, but haven't been successful so far, as I had no prior knowledge of this subject and hence I'm struggling as of now (Though I have improved over past few weeks). To solve this task, I came up with the below code, but unfortunately my cart doesn't move so I don't see any transition in the waveform. I don't expect any direct answers for this task as that would defy the reason for taking this course, but some kind of direction or feedbacks would really help me to proceed further. The testbench is already provided in the above link. My current incorrect code is as below :sad:
Code:
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_signed.all;
use IEEE.std_logic_unsigned.all;

entity Elevator is
	generic ( NUM_FLOORS    : positive);
	port ( BUTTONS_IN       : in  bit_vector ( 1 to NUM_FLOORS );
	       BUTTONS_OUT     : in  bit_vector ( 1 to NUM_FLOORS );
	       DIR_UP          : out bit;
	       DIR_DN          : out bit;
	       DOORS_OPENED    : out bit_vector ( 1 to NUM_FLOORS );
	       MOTOR           : out bit_vector ( 1 downto 0 );
	       FLOOR_NUM       : out integer );
end Elevator;

architecture Behavioral of Elevator is

-- used for IPC  
SIGNAL request: bit_vector(1 to NUM_FLOORS);
-- SIGNAL current: bit_vector(1 to NUM_FLOORS);
SIGNAL rq_move: bit;
TYPE ENUM IS (up, down, stationary);
SIGNAL cart_dir: ENUM := up;
  
BEGIN

-- While the cart is moving up/down and doors are getting
-- opened, store the latest requests coming from differnt
-- floors.
 
cart_snooping: PROCESS( BUTTONS_IN, BUTTONS_OUT)
BEGIN
  request <= BUTTONS_IN or BUTTONS_OUT;
end process cart_snooping;  
   
-- take action on the request   
take_action: process

VARIABLE i,j: INTEGER;
VARIABLE floor_to_service: BIT_VECTOR (1 to NUM_FLOORS);
VARIABLE tmp_request_var: BIT_VECTOR (1 to NUM_FLOORS);
--Assuming the cart is stationary on 1st floor in the beginning
--XXX: How to get across this assumption
VARIABLE current_floor: INTEGER := 1; 
VARIABLE current_floor_tmp: INTEGER := 1;
VARIABLE motor_state: ENUM := stationary;

VARIABLE doors_opened_var: BIT_VECTOR(1 TO NUM_FLOORS);
  
BEGIN
  tmp_request_var := request;
  CASE motor_state IS
  WHEN stationary => 
    DIR_UP <= '0';
    DIR_DN <= '0';
    FLOOR_NUM <= current_floor;
    DOORS_OPENED(current_floor) <= '1'; 
    MOTOR <= "00";
  
  WHEN down =>
    -- first service, requests from lower floors
    FOR i IN current_floor TO 1 LOOP
      IF (tmp_request_var(i) = '1') THEN
        DOORS_OPENED(i) <= '1';
        DIR_DN <= '1';
        DIR_UP <= '0';
        FLOOR_NUM <= current_floor;
        current_floor_tmp := current_floor - 1;
        MOTOR <= "01";
        wait for 5 sec; -- open the doors for 5 seconds        
      END IF;
      WAIT FOR 1 sec; -- time elapsed in moving from one floor to another
      FLOOR_NUM <= current_floor_tmp;
    END LOOP;
    cart_dir <= up;
    
  WHEN up =>
  FOR i IN current_floor TO NUM_FLOORS LOOP
      IF (tmp_request_var(i) = '1') THEN
        DOORS_OPENED(i) <= '1';
        DIR_DN <= '0';
        DIR_UP <= '1';
        FLOOR_NUM <= current_floor;
        MOTOR <= "10";
        current_floor_tmp := current_floor + 1;
        wait for 5 sec; -- open the doors for 5 seconds
      END IF;
      WAIT FOR 1 sec; -- time elapsed in moving from one floor to another
      FLOOR_NUM <= current_floor_tmp;
    END LOOP;
    cart_dir <= down;
    
  END CASE;
  
  FOR i IN 1 TO NUM_FLOORS LOOP
    IF (request(i) = '1') THEN
      cart_dir <= down;
    END IF;
  END LOOP;
  
  motor_state := cart_dir;  
end process take_action;

end Behavioral;

Thank you for your help.
 

Well, as a newbie to the digital logic world, this code models no digital logic. It follows none of the digital logic templates.
I suggest reading up again, and thinking about the circuit you're trying to make before you write any vhdl.
 

Well, as a newbie to the digital logic world, this code models no digital logic. It follows none of the digital logic templates.
I suggest reading up again, and thinking about the circuit you're trying to make before you write any vhdl.

The purpose of this task was not to learn the digital circuits, rather learn the different objects such as processes, signals, variables etc in the VHDL world and use those to model a behaviour of an elevator.
 

You have a testbench for this code I assume, as you cannot synthesise this code and put it on something like an FPGA. It can only be run in a simulator, but it will need a testbench. So with this testbench, you can debug your code.

The problem with doing what you're doing is that you'll have to throw most of it away when it comes to digital logic design - your code looks like C code.
 
You have a testbench for this code I assume, as you cannot synthesise this code and put it on something like an FPGA. It can only be run in a simulator, but it will need a testbench. So with this testbench, you can debug your code.
Yes, I'm running this on a simulator and I do have the testbench as well. As you said, I'll now dig more into the testbench and the waveform to find the problem.

The problem with doing what you're doing is that you'll have to throw most of it away when it comes to digital logic design - your code looks like C code.
Probably you are right, but I've to live with this for now.
 

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