Personally I recommend everyone should do their first layout by hand, not just for understanding the physical design aspect but also to appreciate the tools and their capabilities.
By "Automatic Flow" I think you mean Schematic-Driven Layout, which is achieved using Virtuoso XL, provided your PDK comes with scalable parameterized cells (PCells). Transistors can be merged but I think it depends on the capability of your PCells. Refer to $CDSHOME/doc/vxlhelp/vxlhelp.pdf regarding this tool. Place and route tools is not too common for analog layout (I think), but you can use Virtuoso Chip Assembly Router to perform this task. I have limited experience with this tool, but I found that unless you spend lots of time setting up the rules for the router, it doesn't do a good job.