an interview question

[stonebreaker]

I recently took an interview and was asked a question. I answered with what I could come up with, but I'm not sure about it as I'd never encountered similar problems in my digital design exprience. Here is the question:

A module has 10Gb/s input port, 10Gb/s output port, and DDR3 is used as buffer. When input data rate is 5Gb/s, there is no error, but when input data rate is 9Gb/s or close to 10Gb/s, output has error. What may be the problem.

Here's what I answered:
I guess there might be overflow happening when in 9G/10G input condition. Even though the output port supports up to 10Gb/s output data rate, the reading operation may not always be enabled for some reason, but the data input keeps pouring in and there's not enough DDR3 to buffer the data, causing some data to be overwritten before it is read/sent to output.
So depend on the real situation, I may look to increasing the DDR3 memory size, and I would look at what is hold off the read operation and see if I can optimize it.

Can anyone tell me if my answer is in the right direction? If not, what may be the better answer.

 

[ads-ee]

but the data input keeps pouring in and there's not enough DDR3 to buffer the data, causing some data to be overwritten before it is read/sent to output.
So depend on the real situation, I may look to increasing the DDR3 memory size,

Think about your answer...

DDR3 parts are huge. A buffer in a DDR3 isn't likely to overflow.

Think about how does data gets written to a DDR3...look it up if you don't know. (hint: transfers aren't sustained, i.e. continuous)

How would that affect how you transfer data from the 10G input to the DDR3 and how you would get data from the DDR3 and send it out the 10G? (think about the old fill-and-drain a tank problem)

If you and understand how that transfer has to work then you'll know in what ways you may end up with bandwidth limits in the overall transfer.