elockpicker
Member level 4
Hello everybody,
My question concerns Libero IDE 9.1 :
Is it possible to add an APB (or AHB) bus interface to a user defined HDL module which is recognizable by the 'Auto Connect' command in canvas?
I've seen an Application Note regarding this issue but the device used in there was a Fusion FPGA not an Igloo.
I've also read the Libero IDE user guide and many other resources and couldn't figure out what to do.
I really need your help because my design consists of many APB coprocessors and connecting the APB slaves to APB bus using 'Grid connections' make the canvas so messy.
Regards,
Reza Ameli
My question concerns Libero IDE 9.1 :
Is it possible to add an APB (or AHB) bus interface to a user defined HDL module which is recognizable by the 'Auto Connect' command in canvas?
I've seen an Application Note regarding this issue but the device used in there was a Fusion FPGA not an Igloo.
I've also read the Libero IDE user guide and many other resources and couldn't figure out what to do.
I really need your help because my design consists of many APB coprocessors and connecting the APB slaves to APB bus using 'Grid connections' make the canvas so messy.
Regards,
Reza Ameli