adc sampling frequency greater than clock frequency of fpga

[Siddant Sahu]

I am working on DSP project in which i have to work with FPGA(spartan 3 - xc3s5000) adn adc(ltc2255) , dac(ti-2904) . But i am facing a problem . The clock frequency of fpga is 40 Mhz and sampling frequency of adc is around 80 Mhz (it can not be changed ) . I am giving a clock pulse of 10 Mhz in dac (i can change the input clock frequency given to dac) . Now i have connected my adc output to dac input (both are of 14 bit resolution ) but i am not getting output from dac on cro. So can anyone tell what is the problem ?? I think it is because of higher sampling frequency of adc than fpga but i am not sure ...

 

[FvM]

Besides all considerations of reasonable signal processing design, there should be no problem to pass only 1 of N samples to the DAC. ADC and DAC have both parallel interfaces and can be easily connected to the FPGA.

Seeing no output could be e.g. caused by:

- Fault in ADC or DAC interface design
- Datapath between ADC and DAC flawed
- You are using an analog interface board with input or output transformer coupling and feeding a low frequency signal to the ADC that can't pass the transformers

More information needed.