MamadJun
Junior Member level 2
Dear all
I am not too professional with VHDL and am writing a code.
I write the code also and make it so much readable for u to follow the code.
I made a process which first check if reset is 0 then initial value will be assigned.
If not then check the value " Direction " is right or left or down or up
My question ::sad:
in every these condition I should check that if number is 2 then some thing happens.
the problem is that in line :?: (the line symbol is :? If i dont assign number in the beginning then its not synthesizable
but also when program is running number is changing in another process.
So as u see this is not useful because in the beginning of the process number will be 1 again!!
what should i do to have synthezable code and also not assigning the number in the beginning ?????
:-? : I used reset condition it doesn not affect the synthezibale error
please help
control:
PROCESS( myclk , rst , direction , headH , HeadV )
BEGIN
IF ( rst = '0' or
(
( headH(0) < 4 and headH(1) < 4 )
or
( headH(0) > 636 and headH(1) > 636 )
or
( headV(0) < 4 and headV(1) < 4 )
or
( headV(0) > 476 and headV(1) > 476 )
)
)
THEN
-------------------------initial value
headV <= ( 230 , 233 );
headH <= ( 320 , 323 );
tail1V <= ( 238 , 241 );
tail1H <= ( 314 , 217 );
number <= 1;
ELSIF ( myclk'EVENT AND myclk = '1' ) THEN
-- number <= 1; :?:
CASE direction IS
WHEN right =>
headH(0) <= headH(0) + 4;
headH(1) <= headH(1) + 4;
tail1V <= headv;
tail1H <= headH;
IF ( number = 2 ) THEN
tail2V <= tail1v;
tail2H <= tail1H;
END IF;
WHEN left =>
headH(0) <= headH(0) - 4;
headH(1) <= headH(1) - 4;
tail1V <= headv;
tail1H <= headH;
IF ( number = 2 ) THEN
tail2V <= tail1v;
tail2H <= tail1H;
END IF;
WHEN up =>
headV(0) <= headV(0) - 4;
headV(1) <= headV(1) - 4;
tail1V <= headv;
tail1H <= headH;
IF ( number = 2 ) THEN
tail2V <= tail1v;
tail2H <= tail1H;
END IF;
WHEN down =>
headV(0) <= headV(0) + 4;
headV(1) <= headV(1) + 4;
tail1V <= headv;
tail1H <= headH;
IF ( number = 2 ) THEN
tail2V <= tail1v;
tail2H <= tail1H;
END IF;
WHEN OTHERS =>
NULL;
END CASE;
END IF;
END PROCESS;
I am not too professional with VHDL and am writing a code.
I write the code also and make it so much readable for u to follow the code.
I made a process which first check if reset is 0 then initial value will be assigned.
If not then check the value " Direction " is right or left or down or up
My question ::sad:
in every these condition I should check that if number is 2 then some thing happens.
the problem is that in line :?: (the line symbol is :? If i dont assign number in the beginning then its not synthesizable
but also when program is running number is changing in another process.
So as u see this is not useful because in the beginning of the process number will be 1 again!!
what should i do to have synthezable code and also not assigning the number in the beginning ?????
:-? : I used reset condition it doesn not affect the synthezibale error
please help
control:
PROCESS( myclk , rst , direction , headH , HeadV )
BEGIN
IF ( rst = '0' or
(
( headH(0) < 4 and headH(1) < 4 )
or
( headH(0) > 636 and headH(1) > 636 )
or
( headV(0) < 4 and headV(1) < 4 )
or
( headV(0) > 476 and headV(1) > 476 )
)
)
THEN
-------------------------initial value
headV <= ( 230 , 233 );
headH <= ( 320 , 323 );
tail1V <= ( 238 , 241 );
tail1H <= ( 314 , 217 );
number <= 1;
ELSIF ( myclk'EVENT AND myclk = '1' ) THEN
-- number <= 1; :?:
CASE direction IS
WHEN right =>
headH(0) <= headH(0) + 4;
headH(1) <= headH(1) + 4;
tail1V <= headv;
tail1H <= headH;
IF ( number = 2 ) THEN
tail2V <= tail1v;
tail2H <= tail1H;
END IF;
WHEN left =>
headH(0) <= headH(0) - 4;
headH(1) <= headH(1) - 4;
tail1V <= headv;
tail1H <= headH;
IF ( number = 2 ) THEN
tail2V <= tail1v;
tail2H <= tail1H;
END IF;
WHEN up =>
headV(0) <= headV(0) - 4;
headV(1) <= headV(1) - 4;
tail1V <= headv;
tail1H <= headH;
IF ( number = 2 ) THEN
tail2V <= tail1v;
tail2H <= tail1H;
END IF;
WHEN down =>
headV(0) <= headV(0) + 4;
headV(1) <= headV(1) + 4;
tail1V <= headv;
tail1H <= headH;
IF ( number = 2 ) THEN
tail2V <= tail1v;
tail2H <= tail1H;
END IF;
WHEN OTHERS =>
NULL;
END CASE;
END IF;
END PROCESS;