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ping said:It's correct!
Normally u use CMOS tech, and the pitch is the space that goes from a ground line to the next one. u have the ground line, the first transistor, vdd line, the second transistor and then the second ground line. In this picture (It's THE STANDARD for the so called "node technology") half pitch is a dimension little greater than the channel lenght. Example 90 nm -> +- .65 nm Leff
bye, ping