manpmanp
Newbie level 4
Tools: Synopsys design_vision 2013 / Questasim 10.0d / tech ST65nm
I have several issues with simulation of my synthesized netlists from design_vision.
1- As a simple design, I synthesized a generic multiplier. Behavioral simulations go well, simulation synthesized netlist, the simulator generates several intermediate values which I cannot figure out where from the come!!!
As I mentioned this simple design, is purely combinatorial and simply implemented as:
**broken link removed**
A snapshot of the simulator results is added? I tried to make a relation between the real input, midterms and final output investigating different options such as partial product, and, or ..., however no clue what are these values?
Can anyone with experience in this issue help me to understand them, since I need to avoid any wrong result at anytime???
I have several issues with simulation of my synthesized netlists from design_vision.
1- As a simple design, I synthesized a generic multiplier. Behavioral simulations go well, simulation synthesized netlist, the simulator generates several intermediate values which I cannot figure out where from the come!!!
As I mentioned this simple design, is purely combinatorial and simply implemented as:
Code:
entity MultBlock is
port (
MultWord1xDI : in unsigned(WORDLEN_MEM/2-1 downto 0);
MultWord2xDI : in unsigned(WORDLEN_MEM/2-1 downto 0);
MultOutxDO : out unsigned(WORDLEN_MEM-1 downto 0)
);
end MultBlock;
architecture rtl of MultBlock is
begin
MultOutxDO <= MultWord1xDI*MultWord2xDI;
end rtl;
**broken link removed**
A snapshot of the simulator results is added? I tried to make a relation between the real input, midterms and final output investigating different options such as partial product, and, or ..., however no clue what are these values?
Can anyone with experience in this issue help me to understand them, since I need to avoid any wrong result at anytime???