Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Setting parts of logical path as "ideal" in Design Compiler

Status
Not open for further replies.
P

popsika

Newbie level 2
Joined
Aug 10, 2015
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
20
Hi!

I'm quite a newbie in using design compiler. I have parts in my design, which are not present in the actual later circuit, but which I need for the simulation. Because of that, these paths do not need to be considered in the STA. Therefore I marked them as false paths.
But now I have the problem, that some paths are starting in my "real" circuit and ending in my "fake" circuit. So I can not declare the whole path as a false path. Is there a possibility to mark all paths inside a component (I'm using VHDL) as "ideal" in terms of gate and wire delays? I just found the ideal attribute which seems to be used for clock paths.

Thanks in advance!
 

I cannot answer you question directly, but as per info in the 1st paragraph I would like t say something.

"I have parts in my design, which are not present in the actual later circuit, but which I need for the simulation."

As one of the design rules, I have learnt up to now to keep everything which is not intended to be synthesized in the test-bench. It simplifies the steps during design, simulation and synthesis.
So you might try this design approach so as not face the problem described in the 2nd paragraph.
 
That's actually a good idea. I will try to outsource all these components from the actual circuit. Thank for the hint :).
 

popsika said:
That's actually a good idea. I will try to outsource all these components from the actual circuit. Thank for the hint :).
Click to expand...
It is actually a standard design practice. I am sure this procedure will help you now and for future designs.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top