ivlsi
Advanced Member level 3
Hi there,
Let's say we have a bad WLM. So, why not to use Zero-WLM and over-constrain the clock periods and in/out delays?
How the design might be synthesized without WLM? Is it difficult to prepare Zero-WLM by yourself or it always should be provided by the vendor?
Thank you
Let's say we have a bad WLM. So, why not to use Zero-WLM and over-constrain the clock periods and in/out delays?
How the design might be synthesized without WLM? Is it difficult to prepare Zero-WLM by yourself or it always should be provided by the vendor?
Thank you