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C++ embedded programming
I use C to develop hardware driver for a long time, I used to think C++ is not efficient to develop low level driver, but recently I found that by using C++ to develop driver is very good and interesting, anybody can recommend some C++ application notes or book on C++...
hi,phonenix:
design your self, it is pretty easy and fun.
I have designed a special I2C controller myself(master mode).
it helps you to understand the I2C protocal more. it is really not a challenge.
no problem to connect multiple FPGA together by using a BUS, just like a PCI bus.
here the working speed is important, what is the bus working frequency??
if 33Mhz like PCI bus speed, it is no problem to connect upto 8 devices, but pay attention to layout.
if 66Mhz, three or four devices should...
Re: SRAM in FPGA
several configuration mode, let's use Xilinx as example, I use SelectMAP mode to download fpga data, which I like it very much, because I can still use the COnfiguration port as regular CPU port after the FPGA is started.
I refer to use this because it allow software to online...
Re: LVTTL in virtex II Pro
V2P has some limitation when talking to LVTLL(3.3V IO), xilinx has a apps talking about this issue. if you donot design the board correctly, you will damage the chip. please visit the following link
https://www.xilinx.com/bvdocs/appnotes/xapp653.pdf
I have not used matlab to design a true fpga, but I joined one matlab lab. if you want to use matlab to generate DSP netlist, only one channel can supported. all the simulation you have to do in matlab, it is your job to make sure the simulation is correct in matlab, which need some of your...
Hi,guys:
I am working on a FPGA, and I use xc3s1500, but I heard that xilinx spartan-iii has some manufacture issue, and will delay the shipout date. anybody knows what happended??? it will skip my schedule
:(
that is the book our layout engineer use as reference, who I am working with. I read it at his desk several times!
I accept your warning, next time I will not write this kind of msg, but I feel not happy about this!
I use both Xilinx and Altera, but I like Xilinx much more than Altera except the PLL stuff of Altera, so if you donot need complex clocking stuff, use Xilinx.
it is possiple, but I donot recommend this, I always only use DONE as a status signal, DONE has to be pullled up by 330 Ohm resister to vcc if use vritex part. donot screw this signal.
fpga composite decode
it is no problem to do the translation, even 10 years ago, I considered it, but at that ime, fpga is not powerful enough. right now, no problem
I use an outside CPLD to download bif V2 fpga from my own falsh memory(not xc18vxx, just regular boot flash, which can be accessed by software). it is very easy for software to download fpga
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