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Dears
when we use a block like FIR filter, we have bit growth in output. For example we have a 16-bit input and a 32-bit output. In some cases we can just consider MSBs like output(31 downto 16) but sometimes output dynamic range is wide and if we use MSB-bits, some outputs will become zero. I...
I know it. It's for sending data from Hyperterminal to FPGA that I use 16x clock and detect the edge, but in transmit data from FPGA to hyperterminal we send data at 4800 clock. now if our clock was 4801 Hz what we dooooo?
I must use 4800 Hz clock to send data from FPGA to Hyperterminal. I can't change the sampling time because it's related to Hyperterminal. You say when you use 4825 Hz clock, it's work. but why? it make an extra clock after 4800/25 = 192 clock and it make an extra bit. Am I right?
Yes I use 16x clock to track the edge. I use 8 bit data + stop & start bit without parity and flow control. When I use 4800 bps baud rate, if I make a clock 4801 Hz after 4800 clock we have an extra clock and data was corrupted. Am I right? If it's correct and you can't make an exact clock what...
Hello guys, I have a question.
I use Hyperterminal software to send a file to FPGA. I implement a UART Rx in FPGA and loopback it to UART Tx and again I want to return back same character that I send to FPGA in Hyperterminal.
but I have some problems. It's work for about 8000 character for 4800...
for example I use array for a ROM.
type ROM is array (3 downto 0) of std_logic_vector(7 downto 0) :=
x"12",x"a3",x"b0", x"12";
and I want to implement this array by block ROM or RAM. But I don't know how to do this by XST. Could you help me?
Thanks,
But when I active using DSP48A cores (in SP6) it consume 450 DSP core from 50 totally core! and when I choose "Automatic", it doesn't use it. also I choose using of RAM and ROM but it doesn't use them. I must change in my code or I do other things? Thank you again
Hello everyone
I have a question. When we use UART input (Asynchronous input) in FPGA, we use acknowledge to detect valid data and catch it. but we don't send data_valid signal to receiver. Now what we do to detect valid data in receiver? if the line was idle for long time, how do the receiver...
Hi, what is difference between digital signal in base band and digital signal in RF band? I want to know when we shift base band signal to Rf band in analogue domain, in digital it change? and When we use digital instead of analogue signal, for mixer block we need to multiplier? we multiply LO...
Hi, I want to use UART and read data from UART and transmit it as input to my project.
I find UART code and it works. sometimes maybe line be idle and then START bit comes, next 8 bit data comes and then Stop bit comes. I read data by clk with 16 times baud rate and I get data. when 1 cycle is...
You're right, If I use variable istead of signal, what happen? both of them was same or not?
In professional work variable use or not? for example in below code it use variable or it's not routine?
for assign a variable to out port or signal, what place is better?
dout : out std_logic...
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