Bit Growth in digital designing

[rezvania]

Dears
when we use a block like FIR filter, we have bit growth in output. For example we have a 16-bit input and a 32-bit output. In some cases we can just consider MSBs like output(31 downto 16) but sometimes output dynamic range is wide and if we use MSB-bits, some outputs will become zero. I would like to know what we have to do in this situation.
Thanks

 

[KlausST]

Hi,

I would like to know what we have to do in this situation.

It's on the designer what to do. Only you know what is the input values range and what is the output voltage range. Also the resolution and the errors have to be decided.

Imagine a simple multiplier of 16 bit x 16 bit will give a 32 bit result.
1) for simple audio processing you don't need (but are free to use) the 32 bits. The output channels maybe work with 16 or 24 bits. So you have to select what 16 or 24 bits to use.

2) for RMS calculations you will need to process full 32 bits, because with the following square root function it is the opposite:
With a 16 bit input range you get an 8 bit output range. With a 32 bit input range you get a 16 bit output range.

Klaus

 

[FvM]

It's primarly a problem of reasonable filter coefficient scaling.

In a addition, a filter needs dynamic headroom for the internal variables, in case of a FIR for the summation of partial products. If you cut bits for the final output on the MSB side, always use saturation logic because the output might overflow during transient repsonse.