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Re: Synthesis issue- code not synthesizable
Thanks all;
I got the issue resolved. The problem was that synopsis was not able to synthesis anything for a variable if statement. I opened the loop making it static and removing the variable components from the code. This helped the synopsis to...
Re: Synthesis issue- code not synthesizable
I have no issue with router.vhd. I have just posted the part of package , which is giving error.
Thanks,
Manasi
Hello All;
I have code which compare two address(which is a std_logic_vector). I have written it in a pacakge named distance with the function named as path_cost. The code is in vhdl and synthesis tool is synopsys 2011.
Below is the code and synthesis error.
package body distance is
--...
hey friends;
I have to code a routing logic using train algorithm, in vhdl.
Details regarding the routing logic:
The 2-D mesh structure is span in form of tree, as shown in the figure**broken link removed**
The top is the root and addressed as 000, the branches below it are given address...
hello friends;
I have a package. Current declaration of package consist of 1 function and 1 procedure. I did lots of reading online regarding ; a function call in a procedure. However, could not get any clue. I get error stating "output cannot be read".
I might be wrong with the way function...
[MERGED] BCD to decimal conversion question on algorithm
Hi all;
I want to write a function for converting a BCD number into decimal in VHDL. I looked for algorithms online but did not quite understand the logic behind it. I feel one can do it following way:
I have an address input as BCD...
ok, will keep in mind... I was to much thinking about the logic myself and assumed that everything else is obvious...
Sorry for incomplete information...
Manasi
Hey Barry;
I thought you could interpret it should be in VHDL... As I have posted it under FPGA thread..... As by far people program it in VHDL... well its FPGA...
hello friends;
I have a requirement for my project in which, I need to extract individual digit from a BCD digit say(001000110001 => 231 like "0010", "0011", "0001"). How can I do it. What's the easiest method to get it?
Thanks & Regards;
Manasi CHoudhari
hello friends;
I am implementing a circular queue fifo buffer: I am having a issue that when a simulation signal read enable is given my waves stop appearing. I think its some issue with my implementation. can anyone help: following is my FIFO code and the test bench is attached along with...
Hello all;
I am writing a code for FIFO buffer and come across a stage in which I need to increment my read and write pointer. The read and write pointer are std_logic_vector. So incrementing it by 1; requires a hell lot of type cast conversion. It looks something like this...
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