Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
the shot noise is mainly depend on the Ic , which is the DC current in collector junction ,
and if u reduce the IC this will affect the will affect ur gm "the gain of the BJT" wish will affect the oscillation , so u need to be careful when optimize the IC for min shot noise
Pick largest transistor size to give lowest base resistance. This will have a direct impact on noise. An impact of this is that junction capacitances increase with larger transistors.
First, we know Shot Noise in BJT is modelled by Sq(I noise) = 2.q.(Ave I), where I noise = Average Current due to Shot Noise developed across a Potential Barrier such as a PN Junction between Collector and Base, and Ave I = DC or Average Current flowing across this Barrier, and q is the unit charge.
To reduce Shot Noise, you have to reduce the Ave I.
You can use a BJT with lower HFE (DC or Forward Current Gain between Base I and Collector I). Lower HFE is in fact better for high-frequency devices, such as one used as VCO, because lower HFE offers lower quiescent or static power consumption, and lower heat dissipation. Lower HFE only has lower DC current gain but this should not affect AC signals such as one for high-frequency circuits.
Alternatively, you can use a collector feedback or common-base, but this will reduce the overall voltage and current gain. Instability is a problem when using collector feedback due to oscillator and high-frequency noise can be injected from the output back to the input.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.