Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Help needed in making a stable opamp with big load

Status
Not open for further replies.

ranier

Junior Member level 1
Joined
Aug 24, 2005
Messages
18
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,446
Opamp with big LOAD

Hi,

I'm making rail to rail opamp for Buffer.
The Buffer will have big load(10nF) or No load.
My current design structure of opamp is two stage opamp.
First stage is gain stage(diff amp) and second stage is for rail to rail buffer.

I think Dominant pole is determined by load.
If load is 10nF, dominant pole is "rout x load".
If load is 0nF, dominant ploe is "rout of diffential x miller capacitance"

So it is very difficult to make stable opamp at all load condition.

Do you have any idea ?
 

Re: Opamp with big LOAD

The usual cure is to use a buffer with very high output capacity (and therefore low Rout) following the op amp and include in inside the feedback loop.
 

Re: Opamp with big LOAD

It is easy to design for 2 discrete loads than a continuous range. If you have a large miller capacitor, it can only split the poles wherever they initially were. If in the absence of load, the first stage set the dominant pole, the miller drives the first stage pole in and the output pole out, when the load is present, the opposite happens where the output pole is moved in and the first stage pole moved out. So you just have to make sure that the first stage pole is well placed for this to happen.
 

Re: Opamp with big LOAD

Actually the miller compensation always does pole-splitting, which is moving the pole of the first stage towards the lower frequencies (miller effect) and moving the pole at the output to higher frequencies. The miller configuration does not change if you have a load at the output or no load, so in both cases the pole-splitting works the same way. However, if you have a big output capacitive load, then the dominant pole without compensation is at the output. Applying miller compensation will move this dominant pole towards higher frequencies and the pole at the first stage towards lower frequencies. As a result the two poles move closer together and the amplifier will become even more unstable.
I think Flatulent is right in his proposal - you try to decrease the significance of the second stage pole by driving the load with low resistive output.
 

Re: Opamp with big LOAD

Always miller compensation moves the dominant pole in and the non-dominant pole out. It does not matter which is dominant to start with. If it does as you said, it wont be called as pole splitting in all cases., a buffer is the best solution when one has to deal with a whole range of loads., IMO.
 

Re: Opamp with big LOAD

Well, it's a brave statement of yours but I guess you'll have to think a little bit harder than this.
If you don't have Miller compensation the pole of the first stage is 1/(Ro1*C1) and that of the second stage is 1/(Ro2*Cload) and assuming that Ro1 is not very different than Ro2 but Cload >>C1, obviously second stage pole dominates over the first stage pole. Now we apply Miller compensation through Cm and the transconductance of the second stage is gm2. The pole of the first stage becomes
1/((C1+gm2*Cm)*Ro1) and that of the second stage is very roughly gm2/Cload. It is easy to see that the first stage pole moves to lower frequencies while the second stage pole moves to higher frequencies since Ro2 > 1/gm2. But before we applied Miller compensation we had the second stage pole much lower than the first stage one and with the Miller compensation they start moving in the opposite direction but in fact getting closer to each other. It is still pole splitting in a sense however starting from the wrong initial conditions.
 

Re: Opamp with big LOAD

Hi Sutapanaki, I guess you are not familiar with application of miller effect in these situations. It is mostly applied in LDOs where the output pole is naturally dominant to start with due to the heavy load. It is not difficult to prove it theoretically for a two stage opamp and it is easier to see it through simulation with ideal blocks.
I'll try to explain in simple terms
A miller cap introduces voltage shunt local feedback., which can only reduce impedance at both the ports. While it achieves it by increasing the capacitance at the dominant pole location, it reduces the resistance (as the phase of the gain changes by 90deg) at the non-dominant pole location, splitting both the poles.
When the main pole is at the output, after inclusion of Cc, try to find the effective cap at the output by applying a wiggle there. The miller cap applies a part of that voltage to the amp input (which is resistive as it is non-dominant) which is amplified and demands more capacitive current., implying a increase in capacitance., driving the output pole in.
The problem with your analysis is that you are assuming that the amp gain's phase is 0 atleast until the non-dominant pole which is not correct.
 

Opamp with big LOAD

an idea:

add a cap to output node to make sure the output pole dominates, even without the 10nF cap
 

Re: Opamp with big LOAD

Well, although I would like to agree with you, I can not. Of course, the Miller compensation is not mostly used in LDOs. It is used in many kinds of amplifiers working in a feedback configuration. I'm not assuming anything about the phase of the gain and obviously it can not be 0 until the non-dominant pole because there is a dominant pole before that. I put a bit of visual material in the attached file in a final attempt to clarify this thing.



saro_k_82 said:
Hi Sutapanaki, I guess you are not familiar with application of miller effect in these situations. It is mostly applied in LDOs where the output pole is naturally dominant to start with due to the heavy load. It is not difficult to prove it theoretically for a two stage opamp and it is easier to see it through simulation with ideal blocks.
I'll try to explain in simple terms
A miller cap introduces voltage shunt local feedback., which can only reduce impedance at both the ports. While it achieves it by increasing the capacitance at the dominant pole location, it reduces the resistance (as the phase of the gain changes by 90deg) at the non-dominant pole location, splitting both the poles.
When the main pole is at the output, after inclusion of Cc, try to find the effective cap at the output by applying a wiggle there. The miller cap applies a part of that voltage to the amp input (which is resistive as it is non-dominant) which is amplified and demands more capacitive current., implying a increase in capacitance., driving the output pole in.
The problem with your analysis is that you are assuming that the amp gain's phase is 0 atleast until the non-dominant pole which is not correct.
 

Re: Opamp with big LOAD

Hi Sutapanaki
Thanks for your effort and detailed analysis. I mostly agree with your analysis, but I want to emphasize a few things in your results to make things clear.
I used the same circuit as yours (with CL=10nF)and gave a pz run (from input to output) for Cm varying from 100f to 10n and I got the following result (I removed the zero with a vcvs)
********************************************
PZ Analysis `pz': cmil = (100e-15 -> 10e-09)
********************************************
100e-15 0.00%
Poles (Hz)
Real Imaginary Qfactor
1 -3.17674e+02 0.00000e+00 5.00000e-01
2 -1.44976e+06 0.00000e+00 5.00000e-01
No zero is found

1e-12 20.00%
Poles (Hz)
Real Imaginary Qfactor
1 -3.12066e+02 0.00000e+00 5.00000e-01
2 -8.11696e+05 0.00000e+00 5.00000e-01
No zero is found

10e-12 40.00%
Poles (Hz)
Real Imaginary Qfactor
1 -2.65177e+02 0.00000e+00 5.00000e-01
2 -1.73677e+05 0.00000e+00 5.00000e-01
No zero is found

100e-12 60.00%
Poles (Hz)
Real Imaginary Qfactor
1 -1.05628e+02 0.00000e+00 5.00000e-01
2 -4.74864e+04 0.00000e+00 5.00000e-01
No zero is found

1e-09 80.00%
Poles (Hz)
Real Imaginary Qfactor
1 -1.50212e+01 0.00000e+00 5.00000e-01
2 -3.36924e+04 0.00000e+00 5.00000e-01
No zero is found

10e-09 100.00%
Poles (Hz)
Real Imaginary Qfactor
1 -1.56810e+00 0.00000e+00 5.00000e-01
2 -3.23037e+04 0.00000e+00 5.00000e-01
No zero is found

It shows that the output pole is moving from 317Hz to 15.7Hz (which is output pole moving lower, which you seem to claim impossible) and the first stage pole moving from 1.45MHz to 32.3KHz which again is inward movement of the input pole. (The same is seen in your A2 and Aout graphs (A1 is immaterial for the discussion) but the presence of the zero might cause some discomfort, which is why I have given the poles directly)
Both the poles are moving in.., is this pole splitting? Yes because their decade separation has increased (from 73dB for 100f to 86dB for 10n) which is the result we look for in compensation. So this is pole splitting.

1. Let us analyze the root locus., where the output pole is dominant without miller. Your point is that the two poles would approach each other and cross at some point for some value of Cm and continue further., which is not possible by root locus techniques. It is easy to set Cm as the root locus variable and look at the root locus. I can do that and send the MATLAB plot if you need.
2. Can you explain where my explanation on the miller cap a local shunt-shunt feedback is flawed, if at all? That is very intuitive isnt it.
3. Miller effect is a special case of feedback circuits. Feedback analysis is much more comprehensive than miller. Miller, when he wrote about this effect did not conceive that there could be a case where the output pole is dominant so he took the gain as a scalar. The point I'm trying to drive is that when the gain's phase has fallen off to 90deg, the capacitor multiplication becomes resistor, which is seen by the input stage and not the resistor, which ofcourse you have tried to explain, but I'm not able to follow that. Can you explain it with increased details.

I'll be happy to correct If I'm proved wrong.,

Thanks,
Saro
 

Re: Opamp with big LOAD

I finally found a paper that establishes the concept that I was trying to explain. It also explains the conditions where both the poles move in the same direction(as seen in my last post), how to avoid that etc.,
This should settle any doubts.

There is no reason why miller cant be used for LDO's., to my knowledge, it is used extensively.
 

Re: Opamp with big LOAD

I intentionally didn't do pz simulation because to me graphically is more clear than just numbers. I also tend to disagree with buffering the miller cap with vcvs. Yes, it removes the zero, but also the loading of the output by the miller cap. Of course one can artificially insert it there. It is not a problem for low values of CM but when CM becomes comparable with CL, then it matters. Anyway, this is just a detail.
I agree that both poles of the total gain move to lower frequencies as you increase CM. I was wrong by stating initially that they'll move in opposite directions. Needed to do the analysis, that I posted in my previous post to see it.


saro_k_82 said:
It shows that the output pole is moving from 317Hz to 15.7Hz (which is output pole moving lower, which you seem to claim impossible) and the first stage pole moving from 1.45MHz to 32.3KHz which again is inward movement of the input pole. (The same is seen in your A2 and Aout graphs (A1 is immaterial for the discussion) but the presence of the zero might cause some discomfort, which is why I have given the poles directly)

I don't however think that it is the output pole moving to 15Hz. According to what I see - both in my analysis and in the simulations it is the pole at the output of the first stage that is moving to that frequency i.e. first pole of A1(s). Then the second pole of the total gain according to me is at around 16KHz - the discrepancy is probably due to the vcvs that you have. This is 3 decades difference in the the pole locations and one will need 60dB of gain to have 45 deg of phase margin in this case. More than that and the amplifier will have a PM<45.
I don't also think that A1(s) is not important. The first stage sees the load Z12 looking into the input of the second stage and it's frequency behavior actually determines the poles of the total gain as I showed and as it is also seen in the simulation results.



saro_k_82 said:
Both the poles are moving in.., is this pole splitting? Yes because their decade separation has increased (from 73dB for 100f to 86dB for 10n) which is the result we look for in compensation. So this is pole splitting.

Well, you can call it pole-splitting, to me it doesn't look like that, but I guess it is a matter of terminology in this case.
Initially, my assumption was that CM was integrated on chip and limited in value. Thus it is difficult to achieve stability for that load.


saro_k_82 said:
3. Miller effect is a special case of feedback circuits. Feedback analysis is much more comprehensive than miller. Miller, when he wrote about this effect did not conceive that there could be a case where the output pole is dominant so he took the gain as a scalar. The point I'm trying to drive is that when the gain's phase has fallen off to 90deg, the capacitor multiplication becomes resistor, which is seen by the input stage and not the resistor, which ofcourse you have tried to explain, but I'm not able to follow that. Can you explain it with increased details.

I'll be happy to correct If I'm proved wrong.,

Thanks,
Saro

About the resistor - if you look at the frequency plots on page one of the file I posted, there is a flat part, not changing with frequency for Z12. In this frequency range this is a resistive behavior. After the flat portion of the plot, Z12 starts rolling off as 1/sCm, so this flat part and the roll-off look like a resistor in parallel with CM. This is the load seen by the first stage in that frequency range and this impedance will determine where the second pole of the total gain is.
I read the paper that you posted. It basically says that I was wrong saying the two poles will move towards each other. However, I get really dizzy when I see equations that take several lines to fit and can only fit at the bottom of the page. I still prefer to see some picture - easy to remember.
 

Re: Opamp with big LOAD

sutapanaki said:
I also tend to disagree with buffering the miller cap with vcvs. Yes, it removes the zero, but also the loading of the output by the miller cap.
Agreed., but the practice of introducing voltage / current buffer to remove the zero is known and used for decades., so this is not completely out of place for the discussion.
sutapanaki said:
I agree that both poles of the total gain move to lower frequencies as you increase CM. I was wrong by stating initially that they'll move in opposite directions. Needed to do the analysis, that I posted in my previous post to see it.
No it is not. It is considered as a mild failure of pole splitting. If you note the equation, it is completely symmetric wrt both the poles. So the same inward movement of both the poles can happen for input pole dominant case as well. The thread starter just have to avoid this case and drive the resulting pole-splitting zero (this is not the miller zero) beyond the non-dominant pole., to gain full advantage of pole-splitting compensation.
sutapanaki said:
I don't however think that it is the output pole moving to 15Hz. According to what I see - both in my analysis and in the simulations it is the pole at the output of the first stage that is moving to that frequency i.e. first pole of A1(s). Then the second pole of the total gain according to me is at around 16KHz - the discrepancy is probably due to the vcvs that you have. This is 3 decades difference in the the pole locations and one will need 60dB of gain to have 45 deg of phase margin in this case. More than that and the amplifier will have a PM<45.
I don't also think that A1(s) is not important. The first stage sees the load Z12 looking into the input of the second stage and it's frequency behavior actually determines the poles of the total gain as I showed and as it is also seen in the simulation results.
I dont approve most of these statements. It would be interesting to see Z12(s) and Z21(s) from the sim results. It might be due to the feed forward zero, the one that you are describing as a resistive change of a capacitive impedance.
sutapanaki said:
Well, you can call it pole-splitting, to me it doesn't look like that, but I guess it is a matter of terminology in this case.
Initially, my assumption was that CM was integrated on chip and limited in value. Thus it is difficult to achieve stability for that load.
Again not true. You can move the output pole in as much as the input pole in for the same miller cap, for the two different cases.

Thanks,
Saro
 

Re: Opamp with big LOAD

sutapanaki said:
I dont approve most of these statements. It would be interesting to see Z12(s) and Z21(s) from the sim results. It might be due to the feed forward zero, the one that you are describing as a resistive change of a capacitive impedance.

Well, it is not a matter of approval or disapproval. I did look at the simulation results of Z12 (which one do you call Z21?) and they pretty well match what I described. It is not a feed-forward zero (if by this you mean the RHP zero coming from the miller cap). As I also said in the file this zero in Z12 is due to A2(s) starting to roll-off with frequency.

saro_k_82 said:
Again not true. You can move the output pole in as much as the input pole in for the same miller cap, for the two different cases.

Thanks,
Saro

But then may be it is time for you to post some simulation results, as I did. Graphical ones with some annotations would be my preference.
 

Re: Opamp with big LOAD

Hi Sutapanaki, Here I have the simulation results.
I have removed the vcvs to avoid any further confusions.
Case i. First stage pole dominant., both the poles moving in with increasing miller cap.
Component values: R1=100K, R2=200K, C1=10n, C2=1p, gm1=1m, gm2=1m
poles before introducing miller cap, p1s=160, p2s=800K
The poles after miller
Cm = 100f,
p1s=158.8, p2s=725K
Cm= 1p,
p1s=156, p2s=406K
Cm=10p,
p1s=132.5, p2s=86.8K
Cm=100p,
p1s=52.6, p2s=23.8K
Cm=1n,
p1s=7.5, p2s=16.9K
which is seen in the attached plot as well.

Case ii. Output pole dominant. Both the poles moving apart with increasing miller cap.
Component values: R1=400K, R2=200K, C1=10p, C2=1n, gm1=1m, gm2=2m
poles before introducing miller cap, p1s=40K, p2s=800
The poles after miller
Cm = 100f,
p1s=82K, p2s=382.5
Cm= 1p,
p1s=101K, p2s=283
Cm=10p,
p1s=200K, p2s=79.3
Cm=100p,
p1s=295K, p2s=9.7
Cm=1n,
p1s=314K, p2s=0.99

The condition for perfect pole splitting in any case is
gm2 > abs(R1*C1-R2*C2)/(R1*R2*Cnd)
where Cnd is the cap of the non-dominant pole.

The reason why you see the flat portion in the input impedance graph is just the zero created by R2*(C2+Cc) and it has no relation with the gain (gm2).

Thanks,
Saro
 

Re: Opamp with big LOAD

First, I have to correct myself with respect to the frequency plot on page 1 of the first file I posted. A more careful analysis (analytic instead of graphic) shows that the second pole in Z12(s) is not at gm2/(CM+CL) but rather at gm2/CL - this will show some differences in simulation when CM is in the order of CL. Also in this case the 1st stage will see a load that is the resistance corresponding to the flat part of Z12(s) in parallel with the series combination of CL and CM and in this case the second pole of the overall amplifier will be:

p2=gm2/(C1+CL+C1CL/CM)


Now, back to the previous discussion. I simulated your second case where the dominant pole is at the output, CL=1n. The results are attached. This time I included also the graphs of Z12(s). Unless we talk about the same things in different language, I'll have to repeat what I said couple of posts ago - even in this case it is the pole of A1(s) i.e. the output of the first stage, that is defining the dominant pole of the whole amplifier since it is moving to much lower frequencies as we increase the Miller cap. This is very clear from the plots. The pole of A2(s) (which is not a pole of the total amplifier) almost doesn't change with the exception of the cases when the Miller cap becomes comparable to the load capacitance, but even then the change is just about 2x. Instead, the non-dominant pole is defined as I explained in my first file with the corrections I did above.

saro_k_82 said:
The reason why you see the flat portion in the input impedance graph is just the zero created by R2*(C2+Cc) and it has no relation with the gain (gm2).
Thanks,
Saro

Yes, this is in fact the pole of A2(s) and as I said before when A2(s) starts falling with frequency, the impedance flattens. I have never said the pole of A2(s) is caused by gm2. But after that frequency the input impedance of the second stage becomes resistive for a while and plays role in the definition of the non-dominant pole of the whole amplifier and because this resistive part is dependent on gm2, so is the non-dominant pole.
 

Re: Opamp with big LOAD

Hi Sutapanaki,
If I understand your post correctly. You dont agree with my claims that the output pole moves further in with miller compensation where it is intially dominant. You are trying to say that with Cc=0, the output pole dominates and with Cc=1f, suddenly the poles swap places. Something to think about.

About your previous post:
V1(s)/Vin(s) differs from V2(s)/Vin(s) (which is the total transfer function) by just the numerator. Just replace the miller zero with the zero formed by R2(Cc+C2) in the numerator. This is true for both the cases. Since the denominator is common, you should see both the plots (I mean the first stage to the input TF and the Output to the input TF) to show same poles., only their zeros differ. (which can be seen from your plots as well, the only difference between ATOT(s) and A1(s) is just the zeros.
As long as you only see the ac plot and refuse to look at the movement of the poles, you will not be able to appreciate this. There is a plot of input impedance in the pole splitting paper that I attached., where for both cases, Zi(s) looks identical (which is again due to the symmetry in the TF)., from which you cant conclude that the input pole gets dominant (there is enough explanation provided there).

I think the confusion arises because of the assumption that both the ports are isolated., which is true only without the miller cap. I presume you obtained A2(s) by dividing ATOT(s) by A1(s), that is wrong, that can be done only to isolated two-ports. (It is a feedback system and both ports interact you will need a much more complicated expression to get A2(s) alone) In case you had done this, it is easy to see that this TF has one zero at gm2/Cc (the miller cap zero) and a pole at R2*(C2+Cc) which is the output zero, which again can be verified from your plots.
About the zero., I agree there is a terminology confusion. In my initial posts, I did not refer to the zero due to R2 and C2+Cc which is very elementary and not so useful for out discussion. This zero just transfers the capacitive drop to resistive drop after a certain frequency. I was talking about something more involved. I just wanted to give an intuitive explanation of pole splitting in the second case., so I tried to paint a picture where the Cc appears as resistive to one end and capacitive to the other which involves the phase of A2 which can be modeled as j*gm2 just to make things easier to the mind.


I found another paper that discusses this which you will like. It does not contain any equations, just explanations and images :) . I have to scan and upload, if you need them. That is not an IEEE paper, so I have to use the hard copy I have.
There is one more IEEE paper from Stanford which discusses the effect of Cc from minor loop feedback perspective, where block diagram arithmetic is applied. You'll be able to get the transfer function of A2(s) by that approach., and I'm sure you'll be pleased.

I emphasize again,
1. With the introduction of a miller cap, the dominant pole becomes even more dominant irrespective of it's location initially.
2. In some special cases, the non-dominant pole can move in as well, which can be avoided by increasing gm2.
3. gm2> |p2-p1|/(Rd*p1), where Rd is the resistive part of the dominant pole p1. p1 and p2 are dominant and non-dominant poles in Hz or rad/s and their locations in the amp does not matter. If this is satisfied both the poles move away from each other providing maximum benefit from pole splitting.

All these statements are true for any case of miller compensation.

Thanks,
Saro
 

Re: Opamp with big LOAD

saro_k_82 said:
Hi Sutapanaki,
If I understand your post correctly. You dont agree with my claims that the output pole moves further in with miller compensation where it is intially dominant. You are trying to say that with Cc=0, the output pole dominates and with Cc=1f, suddenly the poles swap places. Something to think about.

No, I'm not saying this. I checked again my posts and I don't see me saying this. I agreed that the non-dominant pole also has a tendency to move towards lower frequencies as we increase the Miller cap CM. What I was saying before was that the pole at the output of the 1st stage determines the dominant pole of the amplifier as we increase the Miller cap, even in the case when initially CL is dominating. I'm not trying to say that for CM=1f the poles suddenly swap places, but they eventually do. The step with which I was changing CM before was kind of big and it didn't capture what was happening for the small values of CM. Because I think by now we're kind of friends already :) I spent some more time to see what happens for lower values of CM=1a, 1f, 10f, 100f, 1p, 10p - basically from 0 to C1 and this I did with the parameters from your second case i.e. C1=1nF. The results are summarized in the attached table plus the usual plots from simulation. I used the formulas from my file I attached the first time to calculate this values, they are not extracted from simulation. Simulation results are only to verify the numbers. Again R12 is the active part of the impedance Z12 looking into the 2nd stage, P2s is the pole of the second stage, P1 - the pole of the 1st stage, P2 - the second pole of the 1st stage i.e. A1(s).

As you see the pole of A2(s) doesn't change, simply because CM<<CL. But the pole P1 of the first stage moves from being non-dominant for no CM to be the dominant one somewhere between 10f and 100f. And P2 becomes the non-dominant one. Simulation results match well with this numbers.


saro_k_82 said:
About your previous post:
V1(s)/Vin(s) differs from V2(s)/Vin(s) (which is the total transfer function) by just the numerator. Just replace the miller zero with the zero formed by R2(Cc+C2) in the numerator. This is true for both the cases. Since the denominator is common, you should see both the plots (I mean the first stage to the input TF and the Output to the input TF) to show same poles., only their zeros differ. (which can be seen from your plots as well, the only difference between ATOT(s) and A1(s) is just the zeros.
As long as you only see the ac plot and refuse to look at the movement of the poles, you will not be able to appreciate this. There is a plot of input impedance in the pole splitting paper that I attached., where for both cases, Zi(s) looks identical (which is again due to the symmetry in the TF)., from which you cant conclude that the input pole gets dominant (there is enough explanation provided there).

I agree with your observation that the two TF A1(s) and Atot(s) differ in their numerators only, this is obvious from the graphs and yes, this is true for both cases we are looking at. And I appreciate it, may be not in the way you'd like to see :)


saro_k_82 said:
I think the confusion arises because of the assumption that both the ports are isolated., which is true only without the miller cap. I presume you obtained A2(s) by dividing ATOT(s) by A1(s), that is wrong, that can be done only to isolated two-ports. (It is a feedback system and both ports interact you will need a much more complicated expression to get A2(s) alone) In case you had done this, it is easy to see that this TF has one zero at gm2/Cc (the miller cap zero) and a pole at R2*(C2+Cc) which is the output zero, which again can be verified from your plots.

No, I have never assumed the two ports were isolated. A2(s) I measure, I don't calculate the way you pointed. A2(s)=V2(s)/V1(s), that's it. The zero at gm2/CM is of course a result from them not being isolated and is the RHP zero usually associated with the Miller compensation. It is seen in the simulation results, but I don't take it into account in the graphical derivations I initially posted - just not to complicate things. Actually, I think, it is this zero why I had to make a correction to P2 in my previous plot. What I'm trying to say all this time is that the zero at R2*(CL+CM) is where the input impedance of the second stage Z12 turns active and one needs to take it into account to calculate the non-dominant pole.




saro_k_82 said:
About the zero., I agree there is a terminology confusion. In my initial posts, I did not refer to the zero due to R2 and C2+Cc which is very elementary and not so useful for out discussion. This zero just transfers the capacitive drop to resistive drop after a certain frequency. I was talking about something more involved. I just wanted to give an intuitive explanation of pole splitting in the second case., so I tried to paint a picture where the Cc appears as resistive to one end and capacitive to the other which involves the phase of A2 which can be modeled as j*gm2 just to make things easier to the mind.


Yes, this zero doesn't show in the TF of the total amplifier, but as I said above, to me it is an important one, because it sets the place where Z12 turns active and ultimately the non-dominant pole follows from that behavior.



saro_k_82 said:
I found another paper that discusses this which you will like. It does not contain any equations, just explanations and images :) . I have to scan and upload, if you need them. That is not an IEEE paper, so I have to use the hard copy I have.
There is one more IEEE paper from Stanford which discusses the effect of Cc from minor loop feedback perspective, where block diagram arithmetic is applied. You'll be able to get the transfer function of A2(s) by that approach., and I'm sure you'll be pleased.

Of course, I'd like to see those papers, if you post them.
 

Re: Opamp with big LOAD

Hi,
So you are measuring A2(s) by measuring V2(s) and V1(s) and dividing them, is it. Excuse me if I read it wrong again from your post. I dont see any difference between this measurement and my presumption ATOT(s)/A1(s). This measurement will give you the A2(s) within the feedback loop, but there is no use in dealing with this.., I was able to see from your previous graphs that your A2(s) has one zero at -gm2/Cc and a pole at -R2*(C2+Cc) which is definitely not the real A2(s), that you and I wish.
My point is in these systems, it is not correct to isolate two systems and make the overall gain a product of the two (which you acknowledge too). This is because in your every graph I see Atot(s)=A1(s)*A2(s).

About the first table, Are these the results of ATOT(s)? Can you describe some more about this. How did you arrive at these pole values, p2s, and what is p2? second pole of the first stage is confusing (there are only two poles in the entire system), which is why I'm afraid to isolate the two ports (after lot of effort to isolate properly that is) ., it does not provide results and fails to build intuition.

From your present graph:
I dont believe in A2(s) still, Z12 does not make any distinction between the two cases, so it not worth looking. Atot(s) graph does not show the poles moving towards each other (which is what you wanted to see)., and A1(s) is heavily influenced by the pole from the output stage and not the pole within itself.

A simple pz analysis will tell you everything about pole movement. We can discuss why your ac plots are misleading after that.

Thanks,
Saro
 

Re: Opamp with big LOAD

I have the feeling that you haven't read the first file I posted. I've been trying to keep the same notations as I have there, even the Miller cap I call CM although you designate it as Cc. Because all the poles P1, P2, P2s, and their relation are there on the 1st page. And if we don't know what we're talking about any discussion is immaterial.

saro_k_82 said:
Hi,
So you are measuring A2(s) by measuring V2(s) and V1(s) and dividing them, is it. Excuse me if I read it wrong again from your post. I dont see any difference between this measurement and my presumption ATOT(s)/A1(s). This measurement will give you the A2(s) within the feedback loop, but there is no use in dealing with this.., I was able to see from your previous graphs that your A2(s) has one zero at -gm2/Cc and a pole at -R2*(C2+Cc) which is definitely not the real A2(s), that you and I wish.
My point is in these systems, it is not correct to isolate two systems and make the overall gain a product of the two (which you acknowledge too). This is because in your every graph I see Atot(s)=A1(s)*A2(s).

I hope you'll agree with me that if I measure the total gain as V2(s)/Vin(s) this should be the real gain of the amplifier, right? Let's call this simply GAIN. There are two stages in this amplifier. As is shown in my original file I attached in the beginning, I call the voltage at the output of the 1st stage V1(s). I define A1(s)=V1(s)/Vin(s). Then, I define A2(s)=V2(s)/V1(s). V2(s), of course, is the voltage at the output of the 2nd stage, which is also the output voltage of the whole amplifier. A2(s) includes the loading of CM at the output - somewhat inaccurately shown on the model drawing in the pdf file, but I didn't think this would be a problem as it is correctly shown on the graphs. Then finally I define GAIN_TOT=A1(s)*A2(s). According to what you say, GAIN is not equal to GAIN_TOT - did I understand right? Because if I do it this way the two stages appear decoupled. I don't agree with this and it is because when I look from the output of the 1st stage into the the second stage I see Z12(s) which includes also CM. A quick simulation, yet another attachment, shows GAIN and GAIN_TOT for CM=0, 1p, 10p, 100p, 1n. As you see, those two gains are completely identical, overlapping perfectly. So, they are the same.


saro_k_82 said:
About the first table, Are these the results of ATOT(s)? Can you describe some more about this. How did you arrive at these pole values, p2s, and what is p2? second pole of the first stage is confusing (there are only two poles in the entire system), which is why I'm afraid to isolate the two ports (after lot of effort to isolate properly that is) ., it does not provide results and fails to build intuition.

Please, look into my first pdf file. It's all there. These are the formulas I used to get the numbers in the table:

R12=(1/gm2)*(1+CL/CM)
P2s=1/(Ro2*(CM+CL))
P1=1/[Ro1*(C1+CM(1+A2))]
P2=1/[R12*(C1+CM*CL/(CM+CL))]

If you look at the plot of A1(s) there are two poles and a zero. The first pole I call P1, the second pole I call P2. P1 is also the dominant pole of the whole amplifier and P2 happens to be it's non-dominant pole - of course after a certain value of CM, which is in the table. P2s is just the pole of the second stage.

saro_k_82 said:
From your present graph:
I dont believe in A2(s) still, Z12 does not make any distinction between the two cases, so it not worth looking. Atot(s) graph does not show the poles moving towards each other (which is what you wanted to see)., and A1(s) is heavily influenced by the pole from the output stage and not the pole within itself.

A simple pz analysis will tell you everything about pole movement. We can discuss why your ac plots are misleading after that.

Thanks,
Saro

I hope that what I said above will make clear the things you say in this last section of your post.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top