DDR interface explanation

[aditya1579]

HI

I have not fully understood how a DDR interface works. If the data bits read a byte of data at the rising edge of the clock, how come the same bits see new data at the falling egde of the clock, because the data bits would be pointing to the same location in the memory for the full clock cycle.

Am I thinking right ?

Thanks,
Aditya

--- Updated Jul 21, 2020 ---

Also, I believe that the control signals like Read, Write etc change only once every clock cycle.

 

[KlausST]

Hi,

Let's say you have 8 data lines .... but you want to transfer a 16 bit word..
You could sync low byte to the rising clock edge and high byte to the falling edge...with same address.

Klaus