ravch
Newbie level 5
Given: Vds = 3V and Ids = 60mA, Transistor = atf541m4
I am supposed to design a bias circuit in common gate configuration.
(using FETcurveTracer template in ADS2011 I found Vgs to be 0.58V in common source config.)
So I designed a bias circuit in common gate as shown in the image.
Is this a correct bias circuit?
I am supposed to design a bias circuit in common gate configuration.
(using FETcurveTracer template in ADS2011 I found Vgs to be 0.58V in common source config.)
So I designed a bias circuit in common gate as shown in the image.
Is this a correct bias circuit?