edamark
Newbie
Hi everyone.
I am writing VHDL to interface with an SPI ADC.
Data ready DRDY pulses LOW to indicate that another sample is ready. There are 8 channels at 16 bits, so 128 bits to be read.
The values of the ADC MODE and CLKDIV signals mean that we have 256 CLKs between DRDY pulses.
I started by implementing a state machine, kicked off when DRDY = LOW, but of course if I generate the SCLK in the state machine by toggling the signal I get an SCLK freq which is half the CLK frequency. This then means the next DRDY pulse arrives while SCLK is still reading bits.
Ideally I would want to use 128 pulses at the CLK frequency to generate SCLK. The simple question is, how do I do this?
The state machine is clocked on the rising edge.
I made another state machine which is clocked on the falling edge.
By generating signals in each state machine I gated the clock using both signals to avoid glitches.
It must be wrong, there has got to be a much more elegant way of achieving this and I will kick myself when I find out.
Help!
I am writing VHDL to interface with an SPI ADC.
Data ready DRDY pulses LOW to indicate that another sample is ready. There are 8 channels at 16 bits, so 128 bits to be read.
The values of the ADC MODE and CLKDIV signals mean that we have 256 CLKs between DRDY pulses.
I started by implementing a state machine, kicked off when DRDY = LOW, but of course if I generate the SCLK in the state machine by toggling the signal I get an SCLK freq which is half the CLK frequency. This then means the next DRDY pulse arrives while SCLK is still reading bits.
Ideally I would want to use 128 pulses at the CLK frequency to generate SCLK. The simple question is, how do I do this?
The state machine is clocked on the rising edge.
I made another state machine which is clocked on the falling edge.
By generating signals in each state machine I gated the clock using both signals to avoid glitches.
It must be wrong, there has got to be a much more elegant way of achieving this and I will kick myself when I find out.
Help!