ring0
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Hello,
I have developed a set of open-source applications that can be used to create configurable Verilog/VHDL IP cores with graphical confuguration interfaces. It includes a preprocessor that can recognize control tags inserted in the Verilog/VHDL (or other) source code. Control tags can be used to generate code that depends on IP core parameters. E.g., the following construct:
when provided the edge="falling" parameter will turn into
It is possible to invoke scripts written in Lua programming language that is rather versatile.
The template parameters can be then described in a file with a rather simple syntax to create a configuration GUI (click to enlarge):
Project home page is at http://coretml.sourceforge.net. The distribution includes a couple of simple IP core examples (Hamming code generator and FPGA memory generator).
Is anyone interested in it? Maybe someone has some suggestions?
I have developed a set of open-source applications that can be used to create configurable Verilog/VHDL IP cores with graphical confuguration interfaces. It includes a preprocessor that can recognize control tags inserted in the Verilog/VHDL (or other) source code. Control tags can be used to generate code that depends on IP core parameters. E.g., the following construct:
Code:
always @(\[COLOR="blue"]if[/COLOR]{edge=="rising"}\[COLOR="blue"]then[/COLOR]{posedge}\[COLOR="blue"]else[/COLOR]{negedge} clk)
when provided the edge="falling" parameter will turn into
Code:
always @(negedge clk)
It is possible to invoke scripts written in Lua programming language that is rather versatile.
The template parameters can be then described in a file with a rather simple syntax to create a configuration GUI (click to enlarge):
Project home page is at http://coretml.sourceforge.net. The distribution includes a couple of simple IP core examples (Hamming code generator and FPGA memory generator).
Is anyone interested in it? Maybe someone has some suggestions?