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specman assertions
answer is yes and no.
use temporal expression to do that.
assertions are two kind
(static - without simulation ) -which is not possible in specman
and
(dynamic - while simulation ) - which is very much possible through temporal checks
/.ue
Re: what is assertion??
to add assertion verifies in two ways
static (without simulation) and dynamic while simulation.
static or formal verificatin can be done in case of control logic where verification state space is not expanding too fast. otehrwise tool capicity will be over loaded.
/.ue
jobs in singapore asic
i skeptical they would hire a person from india as they have already operations at bangalore india.
though ppl may share their experince in this regard
Re: dft question
design for testability = DFT.
and fault simulation = FS.
regardign FS: it's simulation of circuit with injection of fault within it. so you need three component
1. circuit defination / model / hdl /configuration (intended circuit, fault free)
2. fault model ::= which...
hi
though
i am not aware of chip you are asking for. but being storage ic engineer. i can say you need
simple micro processor (running approx 100Mhz) and i/o buffer chip as well memory on board to make the system you are planning it will be bit difficult than making it with single ic. but...
best os for development
linux
as many companies are also switching their base os to linux so application developed will be having wide acceptance. and ofcoure easy customization
correct em if i am wrong,
in vlsi you have design devided in three level.
1. library developement
where you deal with transister level and from transistor yo make gates and small blocks.
2. architecture and front end level. where you don't worry about gate and small block. you just create...
Hi ,
I eould suggest if your design is small you can use following free tools,
Spice any version.(win spice for windows)
Magic (for layout) (unix an d win both platform available but unix one is good.
[for technoogy specific laypot detail you can go to mosis site]
if you need meedle prise...
Re: DSP vs VLSI
hi
considering you have already done HDL as course then i would personally suggest to go for DSP as previously said vlsi design can be done by self reading but dsp is anyway required for understanding "real" vlsi design, and its kind of grassroot concept on which digital vlsi...
hi
you can go for cdac course for 4- month that is good but i don't know any course available for short duration of one month rather i suggest to learn yourself the fundamentals regarding vlsi or embeded system.
training in most of the vlsi sourse is tool specific and basics/fundamentls are...
i think it will be integrating more block in circuit which are analog / mix signal.
power consumption reduction would be major issue as analog part drain much static power by bias current
/ue
possibaly,
channal lenth modulation occur due to lateral elecric field in device gettign stronger and important as channel leth reduces and so lambda is correction factor for the assumption about L considered in physics of device.
so i suppose the relation derived for lambda and ids remain...
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