VLSI design considrations...

[Lord Loh.]

vlsi orgate

I was just wondering about a VLSI designs....

1. In VLSI design does one work at the gate levels or does one have to bother about every individual transistor / FET ?

2. The TTL gate ICs have totempole output. In case of an IC like a multiplexer IC, which contains AND gates followed by an OR, does each AND gate inside the IC need a totemple output ? Since they supply current to only one OR gate, I do not think it is needed, or is it ?

 

[JoseLeonardo]

in VLSI design you can work in gate level, transistor level, and layout level, in th last you should work in the design of the mask that the foundry need for building the IC.

 

[ue]

correct em if i am wrong,

in vlsi you have design devided in three level.

1. library developement

where you deal with transister level and from transistor yo make gates and small blocks.

2. architecture and front end level. where you don't worry about gate and small block. you just create something which just solves your problem(i mean architecture comparision, design, developement etc...) and not to forget regirously verify it. (faster you catch problem it is less costly)

3. back end level where you take up design after fron end is completed, you try to realise integration of small block you created through library developed, with gate delay, setup and hold time requrement matching.

i think i have clarified your doubt, in case you have confused, query is most welcome.

btw above thing is true for digital domain vlsi. for analog vlsi you have transistor and small block level approch.

regards
/ue

 

[Lord Loh.]

And the totempole outputs...Do each gate need it ?
For an example : In a multiplexer, does each AND gate need a totempole or the totempole output would suffice for only the final OR gate...

The totempole I believe is to give greater current output...Since the exact current output requirements of the AND gates anre known, there may not be any need for totempole everywhere...What do you guys say ?

 

[dkace]

If I am correct in VLSI design what you have to deal with in Schematic depends on the library you are using. Normally - I don't see why not- you have all the digital you want. Ofcourse you can descend in each gate and alter it, but you have a default gate component- always depending on the technology etc.

In layout ... thinks move there own way...

D.

 

[JoseLeonardo]

When you make VLSI Design, you work in all levels,

Firts you make the Design to gate level.
Next you traslate this Design in Transistor.
and Finally you make the mask or layout, which say what are the active zone in the silicon substrate.

 

[daredge]

for a logic/digital designer, gate level is most common.

for a mixed signal /analog designer, everything is at transistor level.

 

[uk]

I was just wondering about a VLSI designs....

1. In VLSI design does one work at the gate levels or does one have to bother about every individual transistor / FET ?

This depends on which field of design you are interested. If you are an analog designer you have to deal with every transistor. But if you are a digital designer who writes codes with some hdl programmes you can deal with only gate level design.

 

[abhigopal]

In VLSI, generally u work in the FU level . FU --> Functional Unit. You design the algorithm, find out what are the FUs u need, u design them and then later simulate the layout. This willl take care of design considerations

 

[Lord Loh.]

And the totempole ?

In case of Digital Circuits, Do I need the tetempole for every gate ? or only at the output ?