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Recent content by tiger888

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    AC phase shift 180 degree

    Re: op amp dc bias phase shift I think R0 of your testbench should be replaced by inductor (ind). It would be difficult to get the correct DC bias with so large feedback resistor.
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    Which linux version is good to install IC5141 BASE only?

    Re: Which linux version is proper to install IC5141 BASE only? For IC5141base: Redhat enterprise AS/ES 3.0 or Redhat 7/8 with OS patches
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    Cadence IUS run command Linux

    Therse are three methods to start ncsim: 1. Three steps for terminal ncvlog *.v ncelab top_module_name (-nc_options) ncsim top_module_name (-nc_options) 2. one step for terminal ncverilog *.v (+nc_options) 3. The easiest way to start ncsim is by GUI. nclaunch &
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    Can logic circuit with tsmc 0.18um devices work correctly under 1.5V supply?

    Re: tsmc 0.18um process Most foundries's 0.18um standcell library can work with 1.2V, but slower than normal use.
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    ASSURA VS CALIBRE VS DIVA

    digital: Calibre Custom digital/analog: Assura small analog design & older process for 0.18um: Diva for RF circuit postsimulation: only for Assura rcx.
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    matlab & cadence co-simulation

    mmsim 6.1 Cadence only support matlab & AMS co-simulation. You should setup one mixed-signal simulation testbench and select ams simulator. Then you add the interface element to simulink/composer. At last run matlab and ams simultaneously.
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    Virtuoso hierarchical layout design

    Try the "mark" net command in VXL or Virtuoso Turbo. If it does not work, you'd better check your techfile if the via layer definitions been added.
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    Who use Cadence 610 ? ?

    SMIC provided 0.18/0.13um PDK of OA version which could be used for IC610. I think TSMC or other big fabs could provided it too. But IC610's database is not compatible with IC5x. That is the key problem.
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    Cadence Virtuoso Question

    Do you sure these options about Cadence's simulator? Cadence spectre/ams/ultrasim's are different from it. Maybe is some third tools be integrated in ADE only.
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    help! How can I plot the Vth in analog design env

    use calculator of ADE to get vth
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    Current mode circuit, need introduction to CMOS

    Re: Current mode circuit Most of current mode circuits' performance is poor, except few cases such as current steering DAC. It is difficult to build one negative feedback system.
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    Cadence Spectre vs SpectreS

    No difference. Except one read spectre format netlist directly, the other read spice netlist by one socket.
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    Cadence defining units

    It should be limited by your pdk's definition, not by cadence. you can try the ideal resistor of analogLib library.
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    charge pump applications with explanation

    Re: charge pump There are many kinds of charge pumps.

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