Will stand-alone LDO contain capacitor on its chip?

[jesseyu1984918]

Hi,
I'm quite intrested fo learn if those stand-alone LDO has its own on-chip capacitor? Since for an LDO chip, it has quite big area( say 3mm by 3mm on a datasheet), wouldn't it be good to use those space to build capacitor on chip? maybe it will save the cap outside.
But this also will increase the price for one die, would there be a balance between the cap size and area?
Thanks.
Sincerely
Jesse

 

[erikl]

... stand-alone LDO has its own on-chip capacitor? Since for an LDO chip, it has quite big area( say 3mm by 3mm on a datasheet), wouldn't it be good to use those space to build capacitor on chip? maybe it will save the cap outside.
But this also will increase the price for one die, would there be a balance between the cap size and area?

Area capacitance value below amended. erikl

The lion's share of an LDO chip area is used by the output transistor. On-chip capacitor size is only about 10 fF/(µm)² = 10nF/(mm)² (for a 0.18µm process), so it is impossible to embed a reasonable high filter cap. Only compensation caps in the order of 10pF are integrated on-chip. Additional on-chip filter caps in the order of 100pF are possible, and just tolerable in view of cost.

 

[keith1200rs]

10nF per square mm? I want one! I think 10aF per square micron is only 10pF per square mm. Mind you, I am more used to seeing 1fF or 2fF per square um. Are you sure the 10aF is correct?

Keith

 

[erikl]

10nF per square mm? I want one! I think 10aF per square micron is only 10pF per square mm. Mind you, I am more used to seeing 1fF or 2fF per square um. Are you sure the 10aF is correct? Keith

Sorry, I had mixed up femto with atto. The equation below is now corrected.
For a 0.18µm process, tox=4.2e-09 m . Cox=εr(SiO2)*ε0/tox=(3.9*8.854e-12 F/m)/4.2e-09 m = 8.2e-03 F/m² = 8.2 fF/(µm)² = 8.2 nF/(mm)²
1(mm)² = 1e6 (µm)²

10nF per square mm? I want one!

You could get it ... if you're willing to pay for it ;-)

 

[keith1200rs]

But 8.2aF * 1e6 = 8.2pF not 8.2nF! aF=1e-18.

Keith

 

[erikl]

But 8.2aF * 1e6 = 8.2pF not 8.2nF! aF=1e-18.
Keith

Oh yes, very sorry indeed! I had mixed up atto against femto. The equation above is now correct. But it's still 8.2nF/(mm)² .

You wouldn't expect to spend 1(mm)² of Si for a compensation cap of about 10pF ?

 

[keith1200rs]

You wouldn't expect to spend 1(mm)² of Si for a compensation cap of about 10pF ?

No, that's why your numbers didn't make sense to me! I did say 10aF seemed rather low in my earlier post. I normally expect around 1fF/ square um for poly-poly. Gate poly depends on the process. Most of my desigsn are 0.35um or larger with around 2fF for 0.8um and 5fF for 0.35um.

Keith.

 

[erikl]

You wouldn't expect to spend 1(mm)² of Si for a compensation cap of about 10pF ?

No, that's why your numbers didn't make sense to me! I did say 10aF seemed rather low in my earlier post.

Of course you were right, Keith! Sorry for creating such confusion!

I normally expect around 1fF/ square um for poly-poly. Gate poly depends on the process. Most of my desigsn are 0.35um or larger with around 2fF for 0.8um and 5fF for 0.35um.
Keith.

Sure, these are appropriate numbers for those processes. My (now corrected) value was for a 0.18µm process: 8fF/(µm)². Fits well, I guess.

 

[keith1200rs]

[quote="erikl"
Sure, these are appropriate numbers for those processes. My (now corrected) value was for a 0.18µm process: 8fF/(µm)². Fits well, I guess.[/quote]

Yes. I just looked up one of the 0.18um processes I use and it is 8.5fF/(µm)². I must admit I don't come across "atto" very often - only when a simulation goes horribly wrong

Keith.

 

[erikl]

... I must admit I don't come across "atto" very often - only when a simulation goes horribly wrong
Keith.

Right. In the end there are just 6 electrons per volt. Not quite easy to keep them, is it? ;-)