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Why the CMSO switch has poor linearity when it is turned off

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cmosbjt

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NMOS switch,

OIP3 = 40dBm when it is on.
OIP3 = 28dBm when it is off.

I guess the parasitic cap, Cgd, Cgs is contributing to the nonlinearity. But why is it so bad? Is it something related to the low breakdown voltage?

Thanks
 

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