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Why Output voltage DC level is shifted?

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ohenri100

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Hi all,

I am designing a op amp three stage. With A0=110dB, fu=50.195 Mhz.
In frequency 0.5Mhz, Av= 42.905dB.
I simulate transient with sinusoidal source: f=0.5Mhz, amplitude = 500uV, DC=0.9V
but output voltage have DC level = 1.3542V.
Why the average DC level is changed from 0.9V to 1.3542V?
Untitled2.png
 

Hello ohenri100,

please can you post your circuit.

I think it will be the addition of the offset voltages of your amps.

Regards

Rainer
 
Hello rfredel

Yes, my op amp has the input offset voltage = 19.26E-6 (V).
I want to know what is the reason of this phenomenon?

Sorry my circuit can not upload.
 

Hello rfredel

Yes, my op amp has the input offset voltage = 19.26E-6 (V).
I want to know what is the reason of this phenomenon?
Sorry my circuit can not upload.

How did you determine this value?
More than that, I do not understand the meaning of the dc levels as mentioned in your 1st post.
 

As I understand, you determined offset voltage for Aol=110dB, but measured result for Aol=42.905dB. It can be the reason why you have different input/output DC voltages. Try do simulation on another frequencies.
 
As I understand, you determined offset voltage for Aol=110dB, but measured result for Aol=42.905dB. It can be the reason why you have different input/output DC voltages. Try do simulation on another frequencies.

Thanks KonstanU,

I simulated at another frequencies, and result is similar. At another frequencies, DC level is shifted at different levels.
 

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