why is conformal not modeling dlatch as clock gating latch (gated clock dlat)?

[SaSu]

Hi,

I faced an issue where conformal can't remodel a gated clock. And I even found that the D-latch CLK pin tied to the inverted CLK pin of Flop. But still conformal is not modelling these ICG's. And in the same run it's able to model few ICG and not able to model few. Can anyone please help me what might be the reason for it?

If I use "analyze setup -effort ultra" , few of the non modelled ICG's are modelled as ICG's, but still few are left and this effort ultra run is taking around four to finish.

I'm using 11.1-s320 LEC version.


Thank You in advance.

 

[englishdogg]

I think the version you refer is pretty old, try using a latest version.
Are you using "set flatten model -gated_clock", do you see these as notmapped points..

Also try "set analyze option -auto" and still if it is not resolved try "remodel -gated_clock .. .. "