Why I got the same test coverage of transition delay fauls for LOC and LOS???

[Yang Zhao]

Hi,

I am using Fastscan to run atpg simulation for transition delay fault. As we know that the LOS test coverage should be greater than LOC test coverage. But what I got from the atpg simulation results is that they have nearly same test coverage. I looked into the user guide and someone's dofile scripts from the web, and the only different parts of the commands to run LOS or LOC is:
for LOC: set fault type transition -no_shift_launch
set pattern type -seq 2 -clock_po off
for LOS: set fault type transition
set pattern type -seq 0 -clock_po off

And both of them use the same test procedure file. I don't know which part did I miss. Is anyone familiar with this Fastscan tool? Please let me know if you have any clue. If needed I can show you the complete dofile script.

Thanks a lot!!!!!
-Young

 

[D.A.(Tony)Stewart]

Who knows? trace the source of the common procedure file and inquire from Fastscan.

In LOC test patterns, scan enable signal does not need to operate at system speed. Once scan data is loaded through scan chains, scan enable signal transitions to 0. Subsequently, launch and capture clock are applied. Launch vector should be calculated from the response of a CUT at the capture clock because launch and capture clock are applied while scan enable is low. Due to this restriction, LOC test set suffers from large test set size and low fault coverage compared to LOS test set. In addition, it requires more ATPG computation and restrictions than LOS test set whose launch vector is simply shifted in.


Failing LOC transition delay test patterns are used to obtain shmoo plots. From shmoo plots, maximum operating frequencies at nominal supply voltage were collected. Based on the maximum operating frequencies, we calculated the amount of added delay due to defects using the following equation.
Added delay = 1/maximum operating frequency - 1/system frequency