Re: why hold time is not included in critical frequency calc
If you see hold time consatraint , it comes at the same egde of the operating clock i.e there is no time period involved in hold delay calculation that's why hold doesn't effect max frequency.
If you see set up constraint , it comes b/w two diffrent edge of operating clock , the allowable time diffrence between these edge determines your max frequency.
Once the design is closed ,lets say without hold fix , there will be functional failures even if you reduce the clock period because clock period increment increase the time diffrence b/w two diffrent edges, it would not effect the the same clock edge.
Thanks
Arvind