why ESD voltage can apply to pad?voltage difference?

[xuexucheng]

Now I have a problem about ESD that I can not understand. Could you give me some explanation?
When a man have some static electric charges, then he is at some high voltage level which is respect to the infinite far or earth.
When he touch the pad of the chip, how does the voltage apply to the gate and substrate? I think that to apply a voltage, there must be 2 terminals connect to the corresponding gate and substrate. You konw the bird on the high voltage power supply line is very safe becasue there is high voltage but low voltage difference.
The another question is that how dose the ESD diode works? When ESD happen, the diode is forward conducted or revise conducted?
Because the diodes are big, so it can pass large current, is this right?

 

[xuexucheng]

the man often touch the chip at one point!
where is the voltage difference ?

 

[dick_freebird]

Suppose the man is charged, and is holding the chip touching
some pins. Wherever he sets it down, some other pin contacts
a surface of different potential. The voltage he is charged to,
and the capacitance between the bodies, definess a charge that
is waiting to redistribute and doesn't care how.

 

[frankliner]

HBM is not the only ESD model. CDM tests charge the device and apply ground to each pin.

The ESD diodes generally open forward biased. For positive shots the path is usually from one esd diode to the power supply clamp. For negative the other diode is forward biased from substrate.

The current for 2kV HBM is in the range of 1.3A.

 

[xuexucheng]

the bird on the high voltage power supply line is very safe becasue there is high voltage but low voltage difference.

why esd is not the case above?
who can explain?

 

[frankliner]

I think you have the point.

low voltage difference

ESD events are using specified voltage differences:
> 2kV HBM
> 200V MM
> 500V CDM, edge pins > 750V

You can place your IC on the high tension wire next to a bird if you want without damaging it, but if at the same time one in has a path to ground...POW.

 

[dick_freebird]

"Squirrel Body Model" took out the power to one of the local
towns yesterday....

In any case you always have some reservoir of charge and
some current loop to recombine it. The rest is cases and conditions
(zero being among them, and the most desirable but the
least trustworthy).

You don't get to pick your conditions, there's an army of
pessimistic PhDs to do that for you. What you get to live with,
is the agreed-upon canonical test case that is expected
to cover most.

 

[gksivas]

ESD Diodes should be connect in reverse bias always, because that should not affect the actual logic

 

[siddharth1501]

hi

gksivas how it affect the actual logic

 

[vikramc98406]

xuexucheng,

HBM, CDM, MM are applicable while manufacturing process.

HBM while a human testing
CDM while manufacturing process like CMP and other
MM while machine in contact with device

hence a ground potential is automatically applied

we only think of when we touch the pins of chip but it is actually grounded either by battery or PCB

Hope its clear