Why do we want a pulse to be an ouput of a positive edge detector citrcuit?

[ASIC_intl]

Why do we want a pulse to be an ouput of a positive edge detector citrcuit? Even for a negative edge detector also we want a pulse to be an output showing detection of negative edge.

Why do not we simply pass the waveform through a wire/buffer and see the output? In this case a 0 to 1 transition will show detection of positive edge and a 1->0 transition will show detection of negative edge.

 

[yx.yang]

detection of edge

If you just pass the waveform through a wire/buffer and see the output, how will the downstream modules detection the 0--> 1/1-->0 edge? It will also generate a pluse to indicate the event.

 

[ASIC_intl]

Re: detection of edge

There may not be presence of any downstrem module.

Even the downstream module may not need to detect the pulse if there are downstream modules. If the downstream module finds a positive edge it may function accordingly or else it will not function ( if .. else statement).

What do u say?

 

[avimit]

Re: detection of edge

Usually you want to 'record' the events in a signal which had an edge. usually the signal which you are detecting for any 'edge' changes will have a frequency of change much smaller than your clock frequency on which your design is working.
For example an interrupt signal. Say you want to take some action in your hardware when an interrupt edge arrives. Now you may have to detect the 'edge' on interrupt, and do something subsequently. When you genrate a 'pusle' corresponding to that interrupt, you can use the pulse to do 'something meaningful' say for example, loading some data into some register in your design. YOu cannot directly use the 'edge' to clock the registers, as the design will become Async.
Hope you get it
Kr,
avi

 

[kulkarni_saurabh]

Re: detection of edge

I agree with avimit.

The pulse signal which is the output of edge detection mechanism is typically used as an enable input to load a particular value in a register/capture a particular value at a port in case of microprocessors. I am sure there are other applications too. But such a mechanism ensures that the design is completely synchronous.