vamshi990
Newbie level 4
I would like to know why fractional spurs are more of a problem in All digital PLL when compared to more traditional charge pump PLLs. I'm guessing it must be because of the sampling nature of the TDC . Are the fractional spurs that fall beyond the reference frequency folded back due to aliasing? Any references with detailed analysis of this or explanation would be great!
Thanks,
Thanks,