who can understand this circuit???

[ljy4468]

Hi I've a question about the attatched circuit.

In this circuit, gate is fixed 6.3V
and box is load.

when I sweep drain voltage,
Vs is raise up with Vd.
But when Vgs~Vth, Vs stops raising
and current remain constant.

I think MOS is used as switch at first, because vgs-vth>>Vds
and drain current remain constant because TR operates in saturation.

But I want to know why source voltage NOT raise with drain voltage.
Very confused. anyone help me.~

 

[mvs sarma]

the drop across Source resistor is fed back to gate. as long as the this voltage is more than Vgs, the gate is sustained at -ve voltage. and so the source voltage is sustained and behaves with change in Vds. once Vds is reduced to a level that gate is reversed in its net voltage, there will be no further change, as I understand it. Perhaps a description of common source circuit will be a better explanation.

Sarma

 

[peni]

Think a simple concept: when MOS operate at saturation region , Id is constant , and the Id * Load = Vs is constant too. And the maximum of Vs is Vg - Vt

 

[Georgy]

At input the resistanse are very large, and potencial are saved at capacitanse of gate no discharged. Virtual input sourse signal had very large resistanse too.
There needed additional resistor, connected to gate and ground about 1 Mega Ohm.

 

[ljy4468]

Why MOS not turn off due to high source voltage?
It means why source voltage cannot raise up with drain voltage??

 

[boxxang]

I agree with peni.

 

[ieropsaltic]

Assuming long channel device, the MOS will enter saturation at Vds>Vgs-Vth.

Now, at the given circuit, assuming that Vsupply=0, then the MOS is in triode and Id=0. On increasing Vsupply, the current will increase thus the drop across R will increase reducing Vgs. Note that the same decrease occurs at Vds (because Vs increases) but due to the Vsupply increase, Vdrain increases and thus Vds overall increases. At a certain point, Vds will exceed Vgs-Vth and the MOS enters saturation and the current will be constant.

 

[sutapanaki]

In other words and in addition to the previous post, initially when you start increasing Vd from 0 the transistor is in triode and works as a switch, just imagine short and then of course source voltage will follow the drain voltage. After the transistor enters in saturation, the circuit becoms a source follower and the source voltage remains fixed by the gate voltage and does not depend on the drain voltage.
Then, I assume you understand why those things are happening - transistor in general is a symetrical device i.e. its structure at the source is the same as at the drain. When your drain is low, say 0v both Vgs and Vgd are big enough to support a channel at the source and drain. However, when you start increasing the drain, the Vgd decreases and at a certain point (about Vd=5v according to your sims) the gate voltage will be just a Vth higher than the drain voltage. A bit further on and the gate will not be high enough with respect to drain to support a channel at the drain side and the transistor goes in saturation, the channel is pinched-off. This happens at a certain source voltage (remember the source has been following the drain up to now) which defines a Vgs which in turn corresponds to the drain current which is now constant to a first order and does not depend on what happens at the drain. And in this case of course, the source will not change, the circuit is a source follower with a fixed gate voltage.