who can give some explaination for delay lock loop

[AndyJing]

DLL Delay Lock Loop
DDLL Digital Delay Lock Loop
PLL Phase Lock Loop
DPLL Digital Phase Lock Loop


why use DLL other than PLL in some design?

I only know DLL have low jitter,but can not multiply frenquency.

 

[AndyJing]

have some books about DLL ?

 

[tom123]

DLL use delay lines to compensate clock's latency.

the delay line's delay can be voltage controlled.

because for a clock that is delayed by one clock cycle

is same as the original clock.

best regards

DLL Delay Lock Loop
DDLL Digital Delay Lock Loop
PLL Phase Lock Loop
DPLL Digital Phase Lock Loop


why use DLL other than PLL in some design?

I only know DLL have low jitter,but can not multiply frenquency.

 

[dBUGGER]

Hi AndyZing...
Please refer the following site. All your doubts will be clear.
**broken link removed**

Regards

 

[basemgergawy]

High AndyJing

DLL or Delay tracking lock loop is a unit in CDMA reciever used to generate the PN code with the same phase of the transmitted one. Any phase shift between the modilating PN code and the Demodulating PN code leads to low signal to nosie ratio.

PLL is exactly like DLL but used in analog systems to generate the carier in the reciever has the same phase on modilating carrier

 

[blowfish]

Hai,

I know about the DLL (delay locked loop ) but i am not able to find any paper which gives complete details about the DLL circuit ,also which can be implemented completely using the VHDL or VERILOG HDL simulation tools as it contains some part of circuits in as analog circuits .

I am attaching a DLL paper which may be useful to some extent

 

[satya_422]

please find them in the attachment

DLL Delay Lock Loop
DDLL Digital Delay Lock Loop
PLL Phase Lock Loop
DPLL Digital Phase Lock Loop


why use DLL other than PLL in some design?

I only know DLL have low jitter,but can not multiply frenquency.