Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

which factors decides speed of fpga

Status
Not open for further replies.

ramsvlsi

Newbie level 4
Joined
Oct 26, 2006
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,315
hi friends

i want to find out at what max rate FPGA can run(theoretically) .

ex: XILINX Virtex 4 FPGA
in virtex-4 data sheet given as
500MHz for Blockram and DSP SLICES
450MHz for PowerPC (for FX FPGA's)


but when i am trying to generate clock from DCM IP Core it showing maximum limit is around 330MHz in high speed mode.

is there any effects of speed grade on operating frequency.

i am bit confused with all this values. please tell me what are the factors do i need to consider to find maximum operating frequency of fpga.

can we drive around >600MHZ data signals as inputs to fpga. where can i findout all these info.


thanking you
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top