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OCV is performed for more accurate TA as it can consider both max delays and min delays for different cells in same path which is not the case for other analysis, ofcourse you have to be taking care of issues like CRPR etc. So these days it is more like a standard while doing Timing Analysis.
Could you please tell how do you decide whether OCV analysis is required or not. I understand that it is more accurate as it take both min and max libs for same path. But this could be more pessimistic.
I think OCV is only require when the slow and fast conditions can be physically exist in chip at the same time. For example for if the max corner is 1v and 105C temp and min corner is 1.25v and 95C temp then OCV must be done. But if the max corner is 1.5v and 125C temp and min corner is 1.95V and -40C temp , then OCV analysis will be pessimistic, and bc_wc analysis or would be good enough for that. This kind of PVT are usually in older process like 130nm , 180nm. But one of my friend said even if the process is 180nm , you should use the OCV for accurate results. I am confuse now whether should I go for OCV or bc_wc for 180nm process :-?.
Could anybody please clear my doubts and share how do you decide the analysis type based on process / PVT.
I think that there is no universal rule to decide whether doing OCV or not. It depends on the process you use (I mean foundry not node) and also your application.
You should check your foundry sign-off condition. It should contain some information about doing OCV or not, and if yes what margin should be taken.
Also depending on the speed of your application it might not be useful. If you have a large slack, turning on/off the OCV will not make many difference on the results but will change the analysis time.
If you really have doubt (or you foundry don't give any information), the best is to check both (I know, it's not a really helpful answer...).
For information: in a past project using 180nm I could no see significant result between using OCV or not.
OCV becomes more relevant at lower nodes as Process variations become more prominent at those nodes. The lower nodes throw a bigger challenge at the existing lithographic techniques. Fabrication becomes more difficult so the effects play a bigger role in chip performance. Process variations include not only temp and voltage but dopant variations etc..
So present day technology almost always includes OCV analysis.
Besides the min/max corner and derating factor, slew is one of the thing which affect the timing. Even if you are not giving min/max library , then also you should do OCV to analyzed the min/max slew propagation properly.