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U mean just design according to spec & straight away bring it to market.. Then definitely the company wont last for even a single day..
What is the use of just designing , without confirming whether the circuit works as per the specifications....
we r inserting the dft structur into the design for debugging purpose and also inorder to know the fault is because of manufacturing defect or the fault is because of the functionality·
Hi ,
Before sending your chip/design to the end customer ,we need segregate the good working chip & the bad one before shipping.
This can be done only by testing .So here functional testing will not be able to test all the nodes in the design .So for this we need to have test logic ( DFT) in the design which is minimal of around ~10% of the design logic .
after manufactured, circuits in a die should be tested to find bad ones, and send good ones to assemble. the test partern are obtained in design stage.
t test logic is added into t chip..DFT basically is addition of a little extra hardware to t circuit so as to make t chip after fabrication easily testable for manufacturing defects!
Yes DFT addition is certainly an overhead in terms of area and timinig,but it is necessary so tat chips which r not manufactured properly can be recognized early and also the corrections to be made in t manufacturing process requires less time...so it is a necessary evil...
Testing is requried to prevent bad product reaching the customer. when you add testing logic to your design it comes more testble(i.e controllability and observablity of the design). so that probability of bad product reaching the customer decreses.
I have a few of DFT questions. Is there any reason why you would use multiple clock domains for different scan chains? As a minimal example, if you have two scan chains, when or why would you use two different clocks for these chains? Are there any benifits for dong so? For any reason what so ever, would any one use two different clocks for the same scan chain (assuming we are using multiplexed version of the scan flops instead of two clock scan flops)?
value of a chip depends on where it is used actually i.e a chip being used in some kind of toys may turn out to be bad,its effect is less,we are losing a toy only.But if a chip is being used in some rocket ete. and there if it fails,loss could be in billions .So its better to go for DFT
Added after 4 minutes:
go for lock up latches for differnt clock domains
Added after 13 minutes:
sheikh145 said:
value of a chip depends on where it is used actually i.e a chip being used in some kind of toys may turn out to be bad,its effect is less,we are losing a toy only.But if a chip is being used in some rocket ete. and there if it fails,loss could be in billions .So its better to go for DFT
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