what's the function of this circuit?

[patriot]

Thanks in advance!

 

[Yahia Muhammad]

well it's a cmos inverter
if the upper transistor is p-channel
and the lower transistor is n-channel

 

[amriths04]

if both are n channel, it is a sort of source follower as the top transistor is saturated and the bottom is in triode(mostly).

well it's a cmos inverter
if the upper transistor is p-channel
and the lower transistor is n-channel

Added after 25 seconds:

ya,.....well it's a cmos inverter
if the upper transistor is p-channel
and the lower transistor is n-channel

 

[patriot]

both are n-channel

 

[rfzheng]

if they are both n-channel, I have never see this type of source follower before, i think there must be very big leakage current.

but bow about upper nmos ,and lower pmos, there is a interviewer who asked me this question before.

hehe, is it funny? can you draw the output curve when the input voltage sweep from 0 to vbat??

 

[patriot]

from Razavi's book "Design of analog cmos",the bottom nmos is also saturated,
It is said that this source follower will have lower leakage current than the circuit which is followed by a resistor Rs?
However,according to the voltage Vin,Vbatt,the bottom nmos is in triode as amriths04 said.

PS:0<Vin<2V,Vbatt=3.5V

 

[patriot]

It may be an active attenuator,I find a paper about this.
However,Vin is so small,why it need attenuation ?
If Vin<Vt,what's the voltage of Vout?

 

[satyasiva]

if they are both n-channel, I have never see this type of source follower before, i think there must be very big leakage current.

but bow about upper nmos ,and lower pmos, there is a interviewer who asked me this question before.

hehe, is it funny? can you draw the output curve when the input voltage sweep from 0 to vbat??

it si always off

Added after 6 minutes:

It may be an active attenuator,I find a paper about this.
However,Vin is so small,why it need attenuation ?
If Vin<Vt,what's the voltage of Vout?

can u please attach that paper

 

[amriths04]

of course it is an attenuator.
voltage gain for a source follower is gm/(gm+gmb)(provided the upper n mos has a large output resistance, else it is even less).
so it is an attenuator.

from Razavi's book "Design of analog cmos",the bottom nmos is also saturated,
It is said that this source follower will have lower leakage current than the circuit which is followed by a resistor Rs?
However,according to the voltage Vin,Vbatt,the bottom nmos is in triode as amriths04 said.

PS:0<Vin<2V,Vbatt=3.5V

 

[patriot]

if the two NMOS are both off,Vout is in state of high-resistance,but it 's not practical for the circuit. it connects with an "Enable" signal,which will enable for logic High,and disable for logic Low,
So it is impossible to output a state of High-Resistance,

 

[amriths04]

what do you mean patriot?
why not?

if vth=1v and say you give a 0.5 v input, surely both transistors are going to be in cutt-off. so the output will be in a high impedance state. what is wrong with the above statement?

 

[masri]

it belongs to digiotal electronics cmos circuit

 

[the_risk_master]

I have encountered this in one of the topics in Boylestads book, and its a CMOS inverter

 

[patriot]

what do you mean patriot?
why not?

if vth=1v and say you give a 0.5 v input, surely both transistors are going to be in cutt-off. so the output will be in a high impedance state. what is wrong with the above statement?

yes,the output will be in a high impedance state if Vin<Vth,but it is impossible for a impedance state in my pritical circuit,this part is used in 1st stage of an input signal.



So i doubt it is an attentuator,if it is an inv as the_risk_master said,it will be accountable.

the_risk_master ,would you please upload the book you mentioned?
thanks!

 

[ravitest]

it is cmos inverter

 

[sekonder85]

I think it may not be a cmos inverter. However as we known before CMOS consists of two type of fet n and p type.But these two mosfets are n type. Because of this reason it is properly something different from CMOS inverter..

 

[marko_benigno]

agree! for it to be a CMOS inverter, it should be a P-channel and an N-channel. That's why its called CMOS! Otherwise, if both N-channel, its not CMOS and of course not an inverter.

As what was noted in the design, it should be ran in the Linear region wherein the threshold voltages of the two N-channels are equal, for it to be an attenuator. Typical applications of CMOS are in digital/saturation mode.

 

[ashakiranp]

its not a cmos inverter....

 

[abhikohli]

Does anyone have access to spice ? If yes one can try simulating the ckt to get the response and see what is it ?