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The circuit looks like have some problem. The emitter of Q10 don't have any bias. The MP20,21 should be completely turn on. Anyway, I don't have any idea for Q10 except using Cbe as decoupling capacitor.
The circuit looks like have some problem. The emitter of Q10 don't have any bias. The MP20,21 should be completely turn on. Anyway, I don't have any idea for Q10 except using Cbe as decoupling capacitor.
kwkam thank you for replying
you say this circuit have some problem ,but the rezult looks like there is no problem when i simulate this part with hspice,the simulation result is: "out" is high level there is some current through the Q10,this time the gate voltage of MP19 is low and Q9 is in active region; when "out" is high level the current is zero!
i think Q10 is unwanted,just for protection?
You should've told us about the input that you're giving it (analog or digital). Still, I saw something similar in ECL/CML where it is used for temperature compensation. Again, sorry if it's an opamp or something...
Q10 might be a diode clamp to limit the voltage swing, and to prevent a slow recovery time from saturation? Reminds me of a diode clamp in a comparator.
What do you think?
At first glance, I only see the importance in terms of active load simetry, the two MOS all time in saturation. Because for lower current there is a risk of PMOS triode.
But there is clamping, and by the same way, currents in BJT aren't much different. These BJTs goes beside saturation dynamic problem.
The inputs of BJT are configured to diminuish input impedance when base voltage (to ground) greater than diode Q12voltage.
hi zeeshanzia84
the input signal that i give is analog,so i don't think this circuit is about ECL/CML
ya! lladnar23
i simulate the circuit without the Q10,the voltage drop the gate of MP19 is about 0.23v when Q9 is in active region ,and with Q10 the voltage is about 3.1v, that's mean a diode clamp? can you remind the detail of a diode clamp in a comparator?
now, if Q10 is to limit the voltage, the current through it is not needed to be considered because it's too little.right?
If the voltage difference on the drain of M20 and M21 approaches the diode voltage Q10 turnon. The emitter current of Q10 increase the input current to the current mirror M20 and M21. So the drain current of M21 also increase. That counteract the increase of collector current of Q9. Because the base current of Q10 remains small the clamp is active. It will not generate significant minorities.
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