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What values should I consider for HCLK and AMBA AHB bus speed?

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vvmalode

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Hi,
I am implementing arbiter module for AMBA AHB protocol for real time masters in verilog HDL. I want to know what value should I specify for HCLK signal. And what value should I consider for as my bus speed/bus bandwidth/bus rate? At least suggest me the source from where I can get this information.

Waiting for your urgent reply!!!!!!:roll:
 

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