A quesion about PFD
The dead zone is actually determined by the time required to charge the node capacitances of your charge pump transistors. Hence you add delay in the reset path of the your PFD. While calculations on the capacitors of the PMOS/NMOS pairs will give you a theoritical value of the minimum pulse width, a good thing to do is to go for a programmable delay chain of inverters which will thicken the reset pulses.
So, put a delay chain of inverters and then program them to adjust the delay