I encountered a circuit called PWPM (pulse width and pulse position modulation )generator clock receiver (RX) in the paper.
I am wondering how does this circuit work? (From the context of the paper, it should be a limiter, but i'm not sure yet)
The circuit is attached
Thanks for your reply.
But the problem is that the upper transistors are NMOS instead of PMOS, the input impedence of M3 is very small, how can it be an amplifier?
VEry interesing. It does work as a low gain stage. Is it being used as a sort of a level shifter. Did you ever simulate it vs using pmos and seeing the difference.